LLVM Mailing List via llvm-dev
2019-Mar-27 08:14 UTC
[llvm-dev] gcc cannot read assembly produced by llc - back end bug or fundamental incompatibility
Hi I’m having a problem with my back end. This LLVM IR… ; ModuleID = 'main_clean.ll' source_filename = "main.ll" target datalayout = "e-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8" target triple = "avr-atmel-linux-gnueabihf" %Ts5UInt8V = type <{ i8 }> %Ts6UInt16V = type <{ i16 }> @"$s4main3rads5UInt8Vvp" = hidden local_unnamed_addr global %Ts5UInt8V zeroinitializer, align 1 @"$s4main3angs6UInt16Vvp" = hidden local_unnamed_addr global %Ts6UInt16V zeroinitializer, align 2 @__swift_reflection_version = linkonce_odr hidden constant i16 3 @_swift1_autolink_entries = private constant [6 x i8] c"-lavr\00", section ".swift1_autolink_entries", align 2 @llvm.used = appending global [2 x i8*] [i8* bitcast (i16* @__swift_reflection_version to i8*), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @_swift1_autolink_entries, i32 0, i32 0)], section "llvm.metadata" ; Function Attrs: noreturn define protected i16 @main(i16, i8** nocapture readnone) local_unnamed_addr #0 { entry: %2 = tail call swiftcc i16 @"$s3AVR14slowAnalogRead3pins6UInt16Vs5UInt8V_tF"(i8 2) tail call swiftcc void @"$s3AVR7srandom4seedys6UInt16V_tF"(i16 %2) tail call swiftcc void @"$s3AVR11SetupSerial8baudRateys6UInt16V_tF"(i16 9600) %3 = tail call swiftcc i16 @"$s3AVR6randoms5Int16VyF"() store i8 0, i8* getelementptr inbounds (%Ts5UInt8V, %Ts5UInt8V* @"$s4main3rads5UInt8Vvp", i16 0, i32 0), align 1 store i16 0, i16* getelementptr inbounds (%Ts6UInt16V, %Ts6UInt16V* @"$s4main3angs6UInt16Vvp", i16 0, i32 0), align 2 tail call swiftcc void @"$s3AVR5print11unsignedInt10addNewlineys6UInt16V_SbtF"(i16 0, i1 true) tail call swiftcc void @"$s3AVR5print11unsignedInt10addNewlineys6UInt16V_SbtF"(i16 0, i1 true) br label %4 ; <label>:4: ; preds = %4, %entry tail call swiftcc void @"$s3AVR4wait2msys6UInt16V_tF"(i16 100) %5 = tail call swiftcc { i16, i16 } @"$s3AVR11longRandom4s5UInt8V5byte1_AD5byte2AD5byte3AD5byte4tyF"() %6 = extractvalue { i16, i16 } %5, 1 %temp-coercion.coerced.sroa.5.2.extract.trunc = trunc i16 %6 to i8 tail call swiftcc void @"$s3AVR5print15unsignedTinyInt10addNewlineys5UInt8V_SbtF"(i8 %temp-coercion.coerced.sroa.5.2.extract.trunc, i1 true) br label %4 } declare swiftcc i16 @"$s3AVR14slowAnalogRead3pins6UInt16Vs5UInt8V_tF"(i8) local_unnamed_addr #1 declare swiftcc void @"$s3AVR7srandom4seedys6UInt16V_tF"(i16) local_unnamed_addr #1 declare swiftcc void @"$s3AVR11SetupSerial8baudRateys6UInt16V_tF"(i16) local_unnamed_addr #1 declare swiftcc i16 @"$s3AVR6randoms5Int16VyF"() local_unnamed_addr #1 declare swiftcc void @"$s3AVR5print11unsignedInt10addNewlineys6UInt16V_SbtF"(i16, i1) local_unnamed_addr #1 declare swiftcc void @"$s3AVR4wait2msys6UInt16V_tF"(i16) local_unnamed_addr #1 declare swiftcc { i16, i16 } @"$s3AVR11longRandom4s5UInt8V5byte1_AD5byte2AD5byte3AD5byte4tyF"() local_unnamed_addr #1 declare swiftcc void @"$s3AVR5print15unsignedTinyInt10addNewlineys5UInt8V_SbtF"(i8, i1) local_unnamed_addr #1 ; Function Attrs: norecurse nounwind readnone define hidden swiftcc i16 @"$s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF"(i32) local_unnamed_addr #2 { entry: ret i16 0 } attributes #0 = { noreturn "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } attributes #1 = { "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } attributes #2 = { norecurse nounwind readnone "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } !swift.module.flags = !{!0} !0 = !{!"standard-library", i1 false} …produces this assembly when compiled with llc with the AVR back end… .text .file "main.ll" .protected main ; -- Begin function main .globl main .p2align 1 .type main, at function main: ; @main ; %bb.0: ; %entry push r16 push r17 ldi r24, 2 call ($s3AVR14slowAnalogRead3pins6UInt16Vs5UInt8V_tF) call ($s3AVR7srandom4seedys6UInt16V_tF) ldi r24, 128 ldi r25, 37 call ($s3AVR11SetupSerial8baudRateys6UInt16V_tF) call ($s3AVR6randoms5Int16VyF) ldi r24, 0 sts ($s4main3rads5UInt8Vvp), r24 ldi r16, 0 ldi r17, 0 sts ($s4main3angs6UInt16Vvp)+1, r17 sts ($s4main3angs6UInt16Vvp), r16 movw r24, r16 ldi r22, 1 call ($s3AVR5print11unsignedInt10addNewlineys6UInt16V_SbtF) movw r24, r16 ldi r22, 1 call ($s3AVR5print11unsignedInt10addNewlineys6UInt16V_SbtF) ldi r16, 100 ldi r17, 0 LBB0_1: ; =>This Inner Loop Header: Depth=1 movw r24, r16 call ($s3AVR4wait2msys6UInt16V_tF) call ($s3AVR11longRandom4s5UInt8V5byte1_AD5byte2AD5byte3AD5byte4tyF) ; kill: def $r24 killed $r24 killed $r25r24 ldi r22, 1 call ($s3AVR5print15unsignedTinyInt10addNewlineys5UInt8V_SbtF) rjmp LBB0_1 .Lfunc_end0: .size main, .Lfunc_end0-main ; -- End function .hidden $s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF ; -- Begin function $s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF .globl $s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF .p2align 1 .type $s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF, at function $s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF: ; @"$s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF" ; %bb.0: ; %entry ldi r24, 0 ldi r25, 0 ret .Lfunc_end1: .size $s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF, .Lfunc_end1-($s4main13setServoAngle5angles6UInt16Vs6UInt32V_tF) ; -- End function .hidden $s4main3rads5UInt8Vvp ; @"$s4main3rads5UInt8Vvp" .type $s4main3rads5UInt8Vvp, at object .section .bss,"aw", at nobits .globl $s4main3rads5UInt8Vvp $s4main3rads5UInt8Vvp: .zero 1 .size $s4main3rads5UInt8Vvp, 1 .hidden $s4main3angs6UInt16Vvp ; @"$s4main3angs6UInt16Vvp" .type $s4main3angs6UInt16Vvp, at object .globl $s4main3angs6UInt16Vvp .p2align 1 $s4main3angs6UInt16Vvp: .zero 2 .size $s4main3angs6UInt16Vvp, 2 .hidden __swift_reflection_version ; @__swift_reflection_version .type __swift_reflection_version, at object .section .rodata,"a", at progbits .weak __swift_reflection_version __swift_reflection_version: .short 3 ; 0x3 .size __swift_reflection_version, 2 .type _swift1_autolink_entries, at object ; @_swift1_autolink_entries .section .swift1_autolink_entries,"a", at progbits .p2align 1 _swift1_autolink_entries: .asciz "-lavr" .size _swift1_autolink_entries, 6 ; Declaring this symbol tells the CRT that it should ;copy all variables from program memory to RAM on startup .globl __do_copy_data ; Declaring this symbol tells the CRT that it should ;clear the zeroed data section on startup .globl __do_clear_bss …which gcc 7.3.0 cannot compile, giving errors like… main.s: Assembler messages: main.s:12: Error: missing ')' main.s:12: Error: missing operand main.s:12: Error: unknown opcode `s3avr14slo' main.s:13: Error: missing ')' main.s:13: Error: missing operand main.s:13: Error: unknown opcode `s3avr7sran' main.s:16: Error: missing ')' main.s:16: Error: missing operand main.s:16: Error: unknown opcode `s3avr11set' I think the identifiers in the LLVM IR are getting garbled? I was expecting assembly code like… call "$s3AVR4wait2msys6UInt16V_tF" and "$s4main3rads5UInt8Vvp": .zero 1 Is this a bug in the AVR back end or is LLVM llc supposed to do this? Thanks for any advice/help you guys can give. Cheers, Carl -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190327/7ed2d4c2/attachment.html>