Clement Courbet via llvm-dev
2018-Jun-28 15:23 UTC
[llvm-dev] RFC: [SLP] Vectorize bit-parallel operations using general purpose registers.
Hi, I'd like to get people's opinions about a small change extending SLP to handle vectorization of some instructions using general purpose registers. A description of the issue and a proof of concept can be found here: https://reviews.llvm.org/D48725 Thanks ! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180628/14eb16dc/attachment.html>