Hong Hu via llvm-dev
2016-Oct-17 02:51 UTC
[llvm-dev] LLVM backend -- Avoid base+index address mode for X86
Hi All, I have a question regarding LLVM backend. I appreciate a lot if anyone can provide some hints. My work here is to avoid base+index address mode for X86 target, to allow base-register only or index-register only address mode. For example, "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed. I understand LLVM backend is a complex system. Can any one help point out which subsystem I should look into to solve my question? Regards, Hu Hong -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161017/842a12f8/attachment.html>
Bruce Hoult via llvm-dev
2016-Oct-17 14:20 UTC
[llvm-dev] LLVM backend -- Avoid base+index address mode for X86
For experimental purposes, you should be able to just go into lib/Target/X86 and remove the patterns in .td files (or maybe some .cpp .. I'm not familiar with the X86 mechanisms) that map to base+index addressing modes. Then the compiler will automatically use some extra temporary register to calculate intermediate addresses. On Mon, Oct 17, 2016 at 5:51 AM, Hong Hu via llvm-dev < llvm-dev at lists.llvm.org> wrote:> Hi All, > > I have a question regarding LLVM backend. I appreciate a lot if anyone can > provide some hints. > > My work here is to avoid base+index address mode for X86 target, to allow > base-register only or index-register only address mode. For example, > "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed. > > I understand LLVM backend is a complex system. Can any one help point out > which subsystem I should look into to solve my question? > > Regards, > Hu Hong > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161017/52f51831/attachment.html>
Hong Hu via llvm-dev
2016-Oct-17 15:06 UTC
[llvm-dev] LLVM backend -- Avoid base+index address mode for X86
Hi Bruce, Thanks for you reply. I check the *.td files under the lib/Target/X86 folder, but have not got interesting findings. It requires some knowledge of LLVM backend to fully understand the *.td files. I will get some background and keep searching. Of course I appreciate if anyone with such experience can point the concrete locations. Regards, Hu Hong On 17 October 2016 at 22:20, Bruce Hoult <bruce at hoult.org> wrote:> For experimental purposes, you should be able to just go > into lib/Target/X86 and remove the patterns in .td files (or maybe some > .cpp .. I'm not familiar with the X86 mechanisms) that map to base+index > addressing modes. > > Then the compiler will automatically use some extra temporary register to > calculate intermediate addresses. > > On Mon, Oct 17, 2016 at 5:51 AM, Hong Hu via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi All, >> >> I have a question regarding LLVM backend. I appreciate a lot if anyone >> can provide some hints. >> >> My work here is to avoid base+index address mode for X86 target, to allow >> base-register only or index-register only address mode. For example, >> "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not >> allowed. >> >> I understand LLVM backend is a complex system. Can any one help point out >> which subsystem I should look into to solve my question? >> >> Regards, >> Hu Hong >> >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >> >> >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161017/89ab5a09/attachment.html>
Jingyue Wu via llvm-dev
2016-Oct-18 03:24 UTC
[llvm-dev] LLVM backend -- Avoid base+index address mode for X86
Maybe modify X86TargetLowering::isLegalAddressingMode to make base+index illegal? On Sun, Oct 16, 2016 at 7:51 PM, Hong Hu via llvm-dev < llvm-dev at lists.llvm.org> wrote:> Hi All, > > I have a question regarding LLVM backend. I appreciate a lot if anyone can > provide some hints. > > My work here is to avoid base+index address mode for X86 target, to allow > base-register only or index-register only address mode. For example, > "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed. > > I understand LLVM backend is a complex system. Can any one help point out > which subsystem I should look into to solve my question? > > Regards, > Hu Hong > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161017/c7aa2dc0/attachment.html>
Hong Hu via llvm-dev
2016-Oct-18 12:50 UTC
[llvm-dev] LLVM backend -- Avoid base+index address mode for X86
Thanks. Found some related code in Native Client implementation. It mainly hacks the X86DAGToDAGISel::matchAddressBase to assign the SDNode to the index register, instead of using base register first. Other hacks try to avoid assign SDNode to base register. I'm still checking Native Client's implementation. Will check the X86TargetLowering::isLegalAddressingMode. Regards, Hu Hong On 18 October 2016 at 11:24, Jingyue Wu <jingyue at google.com> wrote:> Maybe modify X86TargetLowering::isLegalAddressingMode to make base+index > illegal? > > On Sun, Oct 16, 2016 at 7:51 PM, Hong Hu via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi All, >> >> I have a question regarding LLVM backend. I appreciate a lot if anyone >> can provide some hints. >> >> My work here is to avoid base+index address mode for X86 target, to allow >> base-register only or index-register only address mode. For example, >> "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not >> allowed. >> >> I understand LLVM backend is a complex system. Can any one help point out >> which subsystem I should look into to solve my question? >> >> Regards, >> Hu Hong >> >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >> >> >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161018/69247a53/attachment.html>