llvm dev - Oct 2016 - Generate Register Indirect mode instruction

On 10/12/2016 3:15 PM, Alex Bradley wrote:
>
> Yes the result goes into memory. But the *address* of that destination 
> memory location also needs to be loaded first into a register.
>
Your architecture has a single instruction for the following operation?

define void @foo(i32 **%a, i32**%b) {
entry:
   %l1 = load i32*, i32** %a, align 4
   %l2 = load i32, i32* %l1, align 4
   %l3 = load i32*, i32** %b, align 4
   %l4 = load i32, i32* %l3, align 4
   %add = add i32 %l2, %l4
   store i32 %add, i32* %l1, align 4
   ret void
}

In theory, it should be possible to match this, at least using C++ 
code.  There isn't any other architecture like that in LLVM, though, so 
I'm not sure how that would work out in practice.

-Eli

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux
Foundation Collaborative Project

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On 10/12/2016 5:45 PM, Friedman, Eli via llvm-dev wrote:
> On 10/12/2016 3:15 PM, Alex Bradley wrote:
>>
>> Yes the result goes into memory. But the *address* of that destination
>> memory location also needs to be loaded first into a register.
>>
>
> Your architecture has a single instruction for the following operation?
>
> define void @foo(i32 **%a, i32**%b) {
> entry:
>   %l1 = load i32*, i32** %a, align 4
>   %l2 = load i32, i32* %l1, align 4
>   %l3 = load i32*, i32** %b, align 4
>   %l4 = load i32, i32* %l3, align 4
>   %add = add i32 %l2, %l4
>   store i32 %add, i32* %l1, align 4
>   ret void
> }
If I understand correctly:

%v1 = load i32, i32* %a
%v2 = load i32, i32* %b
%v3 = add i32 %v1, %v2
store i32 %v3, i32* %c

maps to (using invented mnemonics):

ASSIGN R0, %a
ASSIGN R1, %b
ASSIGN R2, %c
ADD *R2, *R0, *R1

I.e. pattern
   (store %c, (add (load %a), (load %b)))
becomes
   (ADD (ASSIGN R2, %c), (ASSIGN R0, %a), (ASSIGN R1, %b))

-Krzysztof

> If I understand correctly:
>
> %v1 = load i32, i32* %a
> %v2 = load i32, i32* %b
> %v3 = add i32 %v1, %v2
> store i32 %v3, i32* %c
>
> maps to (using invented mnemonics):
>
> ASSIGN R0, %a
> ASSIGN R1, %b
> ASSIGN R2, %c
> ADD *R2, *R0, *R1
>
> I.e. pattern
>   (store %c, (add (load %a), (load %b)))
> becomes
>   (ADD (ASSIGN R2, %c), (ASSIGN R0, %a), (ASSIGN R1, %b))
>
Yes. Exactly.

Regards,
Alex
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