llvm dev - Feb 2016 - New register class and patterns

> On Jan 29, 2016, at 13:25, Rail Shafigulin via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> 
> 
> I think I understand it. But looks like I have everything labelled
properly. Maybe I missed something. Here are more details:
> 
> defm SFEQ  : SF<0x0, "l.sfeq",  Escala_CC_EQ>;
> 
> multiclass SF<bits<5> op2Val, string asmstr, PatLeaf Cond> {
>   def _rr : SF_RR<op2Val, asmstr, Cond>;
>   def _ri : SF_RI<op2Val, asmstr, Cond>;
> }
> 
> class SF_RR<bits<5> op2Val, string asmstr, PatLeaf Cond>
>   : InstRR<0x9, (outs), (ins GPR:$rA, GPR:$rB),
>            !strconcat(asmstr, "\t$rA, $rB"),
>            [(Escalasetflag (i32 GPR:$rA), (i32 GPR:$rB), Cond)]> {
>   bits<5> op2;
>   bits<5> rA;
>   bits<5> rB;
> 
>   let Inst{25-21} = op2;
>   let Inst{20-16} = rA;
>   let Inst{15-11} = rB;
> 
>   let op2 = op2Val;
> }
> 
It sounds to me like you are missing the type for the output. If you’re setting
an implicit register,
you need something like [(set FLAGS, (Escalasetflag i32:$rA, i32:$rB, Cond))].
You also need a corresponding let Defs = [FLAGS], although that’s unrelated to
the pattern problem. Assuming EFLAGS has a single type added to it, you don’t
need to explicitly add one.

Also note you should not need to specify the register class in the pattern.
i32:$sA should work etc.

-Matt

> On Feb 1, 2016, at 16:53, Rail Shafigulin <rail at esenciatech.com>
wrote:
> 
> 
> 
> On Fri, Jan 29, 2016 at 10:03 PM, Matt Arsenault <arsenm2 at gmail.com
<mailto:arsenm2 at gmail.com>> wrote:
> 
> > On Jan 29, 2016, at 13:25, Rail Shafigulin via llvm-dev <llvm-dev
at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
> >
> >
> >
> > I think I understand it. But looks like I have everything labelled
properly. Maybe I missed something. Here are more details:
> >
> > defm SFEQ  : SF<0x0, "l.sfeq",  Escala_CC_EQ>;
> >
> > multiclass SF<bits<5> op2Val, string asmstr, PatLeaf Cond>
{
> >   def _rr : SF_RR<op2Val, asmstr, Cond>;
> >   def _ri : SF_RI<op2Val, asmstr, Cond>;
> > }
> >
> > class SF_RR<bits<5> op2Val, string asmstr, PatLeaf Cond>
> >   : InstRR<0x9, (outs), (ins GPR:$rA, GPR:$rB),
> >            !strconcat(asmstr, "\t$rA, $rB"),
> >            [(Escalasetflag (i32 GPR:$rA), (i32 GPR:$rB), Cond)]> {
> >   bits<5> op2;
> >   bits<5> rA;
> >   bits<5> rB;
> >
> >   let Inst{25-21} = op2;
> >   let Inst{20-16} = rA;
> >   let Inst{15-11} = rB;
> >
> >   let op2 = op2Val;
> > }
> >
> 
> It sounds to me like you are missing the type for the output. If you’re
setting an implicit register,
> you need something like [(set FLAGS, (Escalasetflag i32:$rA, i32:$rB,
Cond))]. You also need a corresponding let Defs = [FLAGS], although that’s
unrelated to the pattern problem. Assuming EFLAGS has a single type added to it,
you don’t need to explicitly add one.
> 
> Also note you should not need to specify the register class in the pattern.
i32:$sA should work etc.
> 
> -Matt
> 
> Let me clarify.
> 
> I'm not sure I understand what you are saying. Let me post more
information.
> 
> Here is what I have defined for Escalasetflag
> 
> def Escalasetflag     : SDNode<"EscalaISD::SET_FLAG",
SDT_EscalaSetFlag,
>                              [SDNPOutGlue]>;
> 
> How come it was working before and is is not working now? Clearly I'm
missing something, but I can't figure out what.
> 
> Any help is appreciated.
> 
> 
> -- 
> Rail Shafigulin
> Software Engineer 
> Esencia Technologies

What is SDT_EscalaSetFlag?

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