David Woodhouse
2015-Feb-23 12:07 UTC
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
On Fri, 2015-02-20 at 13:47 -0500, Rafael EspĂndola wrote:> > Your task, should you choose to accept it, is to make it cope with other > > forms of relaxation where necessary. > > And if not, please open a bug :-)http://llvm.org/bugs/show_bug.cgi?id=22662 FWIW I could reproduce the 'movl foo, %ebx' one but a relative jump *was* using 16 bits (although gas uses 8): $ cat foo.S .code16 jae foo movl (foo), %ebx foo: $ gcc -c -oa.out foo.S ; llvm-objdump -d -triple=i686-pc-linux-code16 a.out: file format ELF64-x86-64 Disassembly of section .text: .text: 0: 73 05 jae 5 2: 66 8b 1e 00 00 movl 0, %ebx $ llvm-mc -filetype=obj foo.S | llvm-objdump -d -triple=i686-pc-linux-code16 - <stdin>: file format ELF64-x86-64 Disassembly of section .text: .text: 0: 0f 83 08 00 jae 8 4: 67 66 8b 1d 00 00 00 00 movl 0, %ebx -- dwmw2 -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/x-pkcs7-signature Size: 5745 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150223/da6fa2ea/attachment.bin>
Craig Topper
2015-Feb-24 08:42 UTC
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
Does gas really relax from 16-bit addresses to 32-bit address as necessary? I played around briefly and it looks like gas will only emit 16-bit addresses in 16-bit mode unless addr32 is prefixed. Even for an external symbol it only emitted a 16-bit relocation type until I added addr32. I wonder if we shouldn't fix the x86 encoder to use 16-bit addresses in 16-bit mode. (Actually I think we're emitting 0x67 prefix because the displacement size check in Is16BitMemOperand doesn't like cases where displacement isExpr instead of isImm). And maybe override the mode in SubTargetInfo around the EmitInstruction call for any that specifies "addr32" in 16-bit mode or "addr16" in 32-bit mode? That doesn't help with jumps though since they do need their opcode switched to JMP_2 instead of JMP_4. Again I can't prove that gas will further relax 2-byte to 4-byte without addr32. I think we either need to again change SubTargetInfo and pass it into relaxInstruction OR we could create new 16-bit mode only 1-byte jumps that we can parse based on mode and relax to the 2 byte form. On Mon, Feb 23, 2015 at 4:07 AM, David Woodhouse <dwmw2 at infradead.org> wrote:> On Fri, 2015-02-20 at 13:47 -0500, Rafael EspĂndola wrote: > > > Your task, should you choose to accept it, is to make it cope with > other > > > forms of relaxation where necessary. > > > > And if not, please open a bug :-) > > http://llvm.org/bugs/show_bug.cgi?id=22662 > > FWIW I could reproduce the 'movl foo, %ebx' one but a relative jump > *was* using 16 bits (although gas uses 8): > > $ cat foo.S > .code16 > jae foo > movl (foo), %ebx > foo: > $ gcc -c -oa.out foo.S ; llvm-objdump -d -triple=i686-pc-linux-code16 > > a.out: file format ELF64-x86-64 > > Disassembly of section .text: > .text: > 0: 73 05 jae 5 > 2: 66 8b 1e 00 00 movl 0, > %ebx > $ llvm-mc -filetype=obj foo.S | llvm-objdump -d > -triple=i686-pc-linux-code16 - > > <stdin>: file format ELF64-x86-64 > > Disassembly of section .text: > .text: > 0: 0f 83 08 00 jae 8 > 4: 67 66 8b 1d 00 00 00 00 movl 0, > %ebx > > > -- > dwmw2 > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > >-- ~Craig -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150224/f719fc61/attachment.html>
David Woodhouse
2015-Feb-24 09:07 UTC
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
On Tue, 2015-02-24 at 00:42 -0800, Craig Topper wrote:> Does gas really relax from 16-bit addresses to 32-bit address as > necessary? I played around briefly and it looks like gas will only > emit 16-bit addresses in 16-bit mode unless addr32 is prefixed. Even > for an external symbol it only emitted a 16-bit relocation type until > I added addr32.I believe you are correct. My use of 32-bit relocations in LLVM was mostly because we didn't yet support addr32. Having code which is correct but slightly larger than needed was better than having some things which you just *couldn't* build, in the short term.> I wonder if we shouldn't fix the x86 encoder to use 16-bit addresses > in 16-bit mode.Yes, we should. Having implemented the addr32 prefix first.> (Actually I think we're emitting 0x67 prefix because the displacement > size check in Is16BitMemOperand doesn't like cases where displacement > isExpr instead of isImm). And maybe override the mode in SubTargetInfo > around the EmitInstruction call for any that specifies "addr32" in > 16-bit mode or "addr16" in 32-bit mode? > > > That doesn't help with jumps though since they do need their opcode > switched to JMP_2 instead of JMP_4. Again I can't prove that gas will > further relax 2-byte to 4-byte without addr32. I think we either need > to again change SubTargetInfo and pass it into relaxInstruction OR we > could create new 16-bit mode only 1-byte jumps that we can parse based > on mode and relax to the 2 byte form.I don't think we need a new opcode for a 16-bit mode 1-byte jump, do we? The mode is already stored in the MCInst because I needed to do that to fix PR18303. -- David Woodhouse Open Source Technology Centre David.Woodhouse at intel.com Intel Corporation -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/x-pkcs7-signature Size: 5745 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150224/7c95026d/attachment.bin>