Owen Anderson
2014-Aug-08 21:51 UTC
[LLVMdev] Proposal: Add a target lowering hook to state that target supports floating point exception behavior.
I assume you meant to ask for ports that *don’t* support floating point exceptions. To my knowledge, neither R600 nor NVPTX support floating point exceptions. —Owen> On Aug 8, 2014, at 2:41 PM, Eric Christopher <echristo at gmail.com> wrote: > > There's a lot of cut and paste in those routines. Can you do something > to unify it a bit? Also, do we have any ports that have support > floating point exceptions? > > -eric > > On Thu, Aug 7, 2014 at 3:07 PM, Pedro Artigas <partigas at apple.com> wrote: >> Hello All, >> >> the patch below adds a target lowering hook to state that the target supports (or not) floating point exception behavior. The patch is small and contains one possible use for the hook (folding potentially exception raising fp operations). >> >> Any comments? >> >> Thanks >> >> Pedro >> >> >> >> >> Index: include/llvm/Target/TargetLowering.h >> ==================================================================>> --- include/llvm/Target/TargetLowering.h (revision 215148) >> +++ include/llvm/Target/TargetLowering.h (working copy) >> @@ -261,6 +261,11 @@ >> bool isMaskAndBranchFoldingLegal() const { >> return MaskAndBranchFoldingIsLegal; >> } >> + >> + /// Return true if target supports floating point exceptions. >> + bool hasFloatingPointExceptions() const { >> + return FloatingPointExceptions; >> + } >> >> /// Return the ValueType of the result of SETCC operations. Also used to >> /// obtain the target's preferred type for the condition operand of SELECT and >> @@ -1053,6 +1058,12 @@ >> /// possible, should be replaced by an alternate sequence of instructions not >> /// containing an integer divide. >> void setIntDivIsCheap(bool isCheap = true) { IntDivIsCheap = isCheap; } >> + >> + /// Tells the code generator that this target supports floating point >> + /// exceptions and cares about preserving floating point exception behavior. >> + void setHasFloatingPointExceptions(bool FPExceptions = true) { >> + FloatingPointExceptions = FPExceptions; >> + } >> >> /// Tells the code generator which bitwidths to bypass. >> void addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth) { >> Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp >> ==================================================================>> --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp (revision 215148) >> +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp (working copy) >> @@ -3402,6 +3402,7 @@ >> } >> >> // Constant fold FP operations. >> + bool HasFPExceptions = TLI->hasFloatingPointExceptions(); >> ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); >> ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); >> if (N1CFP) { >> @@ -3415,28 +3416,32 @@ >> switch (Opcode) { >> case ISD::FADD: >> s = V1.add(V2, APFloat::rmNearestTiesToEven); >> - if (s != APFloat::opInvalidOp) >> + if (!HasFPExceptions || s != APFloat::opInvalidOp) >> return getConstantFP(V1, VT); >> break; >> case ISD::FSUB: >> s = V1.subtract(V2, APFloat::rmNearestTiesToEven); >> - if (s!=APFloat::opInvalidOp) >> + if (!HasFPExceptions || s!=APFloat::opInvalidOp) >> return getConstantFP(V1, VT); >> break; >> case ISD::FMUL: >> s = V1.multiply(V2, APFloat::rmNearestTiesToEven); >> - if (s!=APFloat::opInvalidOp) >> + if (!HasFPExceptions || s!=APFloat::opInvalidOp) >> return getConstantFP(V1, VT); >> break; >> case ISD::FDIV: >> s = V1.divide(V2, APFloat::rmNearestTiesToEven); >> - if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) >> + if (!HasFPExceptions || (s!=APFloat::opInvalidOp && >> + s!=APFloat::opDivByZero)) { >> return getConstantFP(V1, VT); >> + } >> break; >> case ISD::FREM : >> s = V1.mod(V2, APFloat::rmNearestTiesToEven); >> - if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) >> + if (!HasFPExceptions || (s!=APFloat::opInvalidOp && >> + s!=APFloat::opDivByZero)) { >> return getConstantFP(V1, VT); >> + } >> break; >> case ISD::FCOPYSIGN: >> V1.copySign(V2); >> Index: lib/CodeGen/TargetLoweringBase.cpp >> ==================================================================>> --- lib/CodeGen/TargetLoweringBase.cpp (revision 215148) >> +++ lib/CodeGen/TargetLoweringBase.cpp (working copy) >> @@ -705,6 +705,7 @@ >> JumpIsExpensive = false; >> PredictableSelectIsExpensive = false; >> MaskAndBranchFoldingIsLegal = false; >> + FloatingPointExceptions = true; >> StackPointerRegisterToSaveRestore = 0; >> ExceptionPointerRegister = 0; >> ExceptionSelectorRegister = 0; >> >> >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >>
Eric Christopher
2014-Aug-08 21:52 UTC
[LLVMdev] Proposal: Add a target lowering hook to state that target supports floating point exception behavior.
Right, I did. And cool, thanks. It just wasn't part of the patch so it seemed like it was just dead code :) -eric On Fri, Aug 8, 2014 at 2:51 PM, Owen Anderson <owen at apple.com> wrote:> I assume you meant to ask for ports that *don’t* support floating point exceptions. To my knowledge, neither R600 nor NVPTX support floating point exceptions. > > —Owen > >> On Aug 8, 2014, at 2:41 PM, Eric Christopher <echristo at gmail.com> wrote: >> >> There's a lot of cut and paste in those routines. Can you do something >> to unify it a bit? Also, do we have any ports that have support >> floating point exceptions? >> >> -eric >> >> On Thu, Aug 7, 2014 at 3:07 PM, Pedro Artigas <partigas at apple.com> wrote: >>> Hello All, >>> >>> the patch below adds a target lowering hook to state that the target supports (or not) floating point exception behavior. The patch is small and contains one possible use for the hook (folding potentially exception raising fp operations). >>> >>> Any comments? >>> >>> Thanks >>> >>> Pedro >>> >>> >>> >>> >>> Index: include/llvm/Target/TargetLowering.h >>> ==================================================================>>> --- include/llvm/Target/TargetLowering.h (revision 215148) >>> +++ include/llvm/Target/TargetLowering.h (working copy) >>> @@ -261,6 +261,11 @@ >>> bool isMaskAndBranchFoldingLegal() const { >>> return MaskAndBranchFoldingIsLegal; >>> } >>> + >>> + /// Return true if target supports floating point exceptions. >>> + bool hasFloatingPointExceptions() const { >>> + return FloatingPointExceptions; >>> + } >>> >>> /// Return the ValueType of the result of SETCC operations. Also used to >>> /// obtain the target's preferred type for the condition operand of SELECT and >>> @@ -1053,6 +1058,12 @@ >>> /// possible, should be replaced by an alternate sequence of instructions not >>> /// containing an integer divide. >>> void setIntDivIsCheap(bool isCheap = true) { IntDivIsCheap = isCheap; } >>> + >>> + /// Tells the code generator that this target supports floating point >>> + /// exceptions and cares about preserving floating point exception behavior. >>> + void setHasFloatingPointExceptions(bool FPExceptions = true) { >>> + FloatingPointExceptions = FPExceptions; >>> + } >>> >>> /// Tells the code generator which bitwidths to bypass. >>> void addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth) { >>> Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp >>> ==================================================================>>> --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp (revision 215148) >>> +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp (working copy) >>> @@ -3402,6 +3402,7 @@ >>> } >>> >>> // Constant fold FP operations. >>> + bool HasFPExceptions = TLI->hasFloatingPointExceptions(); >>> ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); >>> ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); >>> if (N1CFP) { >>> @@ -3415,28 +3416,32 @@ >>> switch (Opcode) { >>> case ISD::FADD: >>> s = V1.add(V2, APFloat::rmNearestTiesToEven); >>> - if (s != APFloat::opInvalidOp) >>> + if (!HasFPExceptions || s != APFloat::opInvalidOp) >>> return getConstantFP(V1, VT); >>> break; >>> case ISD::FSUB: >>> s = V1.subtract(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp) >>> + if (!HasFPExceptions || s!=APFloat::opInvalidOp) >>> return getConstantFP(V1, VT); >>> break; >>> case ISD::FMUL: >>> s = V1.multiply(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp) >>> + if (!HasFPExceptions || s!=APFloat::opInvalidOp) >>> return getConstantFP(V1, VT); >>> break; >>> case ISD::FDIV: >>> s = V1.divide(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) >>> + if (!HasFPExceptions || (s!=APFloat::opInvalidOp && >>> + s!=APFloat::opDivByZero)) { >>> return getConstantFP(V1, VT); >>> + } >>> break; >>> case ISD::FREM : >>> s = V1.mod(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) >>> + if (!HasFPExceptions || (s!=APFloat::opInvalidOp && >>> + s!=APFloat::opDivByZero)) { >>> return getConstantFP(V1, VT); >>> + } >>> break; >>> case ISD::FCOPYSIGN: >>> V1.copySign(V2); >>> Index: lib/CodeGen/TargetLoweringBase.cpp >>> ==================================================================>>> --- lib/CodeGen/TargetLoweringBase.cpp (revision 215148) >>> +++ lib/CodeGen/TargetLoweringBase.cpp (working copy) >>> @@ -705,6 +705,7 @@ >>> JumpIsExpensive = false; >>> PredictableSelectIsExpensive = false; >>> MaskAndBranchFoldingIsLegal = false; >>> + FloatingPointExceptions = true; >>> StackPointerRegisterToSaveRestore = 0; >>> ExceptionPointerRegister = 0; >>> ExceptionSelectorRegister = 0; >>> >>> >>> _______________________________________________ >>> LLVM Developers mailing list >>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >>> >
Matt Arsenault
2014-Aug-08 21:56 UTC
[LLVMdev] Proposal: Add a target lowering hook to state that target supports floating point exception behavior.
On 08/08/2014 02:51 PM, Owen Anderson wrote:> I assume you meant to ask for ports that *don’t* support floating point exceptions. To my knowledge, neither R600 nor NVPTX support floating point exceptions. > > —OwenSI at least does, although nothing is done with that currently> >> On Aug 8, 2014, at 2:41 PM, Eric Christopher <echristo at gmail.com> wrote: >> >> There's a lot of cut and paste in those routines. Can you do something >> to unify it a bit? Also, do we have any ports that have support >> floating point exceptions? >> >> -eric >> >> On Thu, Aug 7, 2014 at 3:07 PM, Pedro Artigas <partigas at apple.com> wrote: >>> Hello All, >>> >>> the patch below adds a target lowering hook to state that the target supports (or not) floating point exception behavior. The patch is small and contains one possible use for the hook (folding potentially exception raising fp operations). >>> >>> Any comments? >>> >>> Thanks >>> >>> Pedro >>> >>> >>> >>> >>> Index: include/llvm/Target/TargetLowering.h >>> ==================================================================>>> --- include/llvm/Target/TargetLowering.h (revision 215148) >>> +++ include/llvm/Target/TargetLowering.h (working copy) >>> @@ -261,6 +261,11 @@ >>> bool isMaskAndBranchFoldingLegal() const { >>> return MaskAndBranchFoldingIsLegal; >>> } >>> + >>> + /// Return true if target supports floating point exceptions. >>> + bool hasFloatingPointExceptions() const { >>> + return FloatingPointExceptions; >>> + } >>> >>> /// Return the ValueType of the result of SETCC operations. Also used to >>> /// obtain the target's preferred type for the condition operand of SELECT and >>> @@ -1053,6 +1058,12 @@ >>> /// possible, should be replaced by an alternate sequence of instructions not >>> /// containing an integer divide. >>> void setIntDivIsCheap(bool isCheap = true) { IntDivIsCheap = isCheap; } >>> + >>> + /// Tells the code generator that this target supports floating point >>> + /// exceptions and cares about preserving floating point exception behavior. >>> + void setHasFloatingPointExceptions(bool FPExceptions = true) { >>> + FloatingPointExceptions = FPExceptions; >>> + } >>> >>> /// Tells the code generator which bitwidths to bypass. >>> void addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth) { >>> Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp >>> ==================================================================>>> --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp (revision 215148) >>> +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp (working copy) >>> @@ -3402,6 +3402,7 @@ >>> } >>> >>> // Constant fold FP operations. >>> + bool HasFPExceptions = TLI->hasFloatingPointExceptions(); >>> ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); >>> ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); >>> if (N1CFP) { >>> @@ -3415,28 +3416,32 @@ >>> switch (Opcode) { >>> case ISD::FADD: >>> s = V1.add(V2, APFloat::rmNearestTiesToEven); >>> - if (s != APFloat::opInvalidOp) >>> + if (!HasFPExceptions || s != APFloat::opInvalidOp) >>> return getConstantFP(V1, VT); >>> break; >>> case ISD::FSUB: >>> s = V1.subtract(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp) >>> + if (!HasFPExceptions || s!=APFloat::opInvalidOp) >>> return getConstantFP(V1, VT); >>> break; >>> case ISD::FMUL: >>> s = V1.multiply(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp) >>> + if (!HasFPExceptions || s!=APFloat::opInvalidOp) >>> return getConstantFP(V1, VT); >>> break; >>> case ISD::FDIV: >>> s = V1.divide(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) >>> + if (!HasFPExceptions || (s!=APFloat::opInvalidOp && >>> + s!=APFloat::opDivByZero)) { >>> return getConstantFP(V1, VT); >>> + } >>> break; >>> case ISD::FREM : >>> s = V1.mod(V2, APFloat::rmNearestTiesToEven); >>> - if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) >>> + if (!HasFPExceptions || (s!=APFloat::opInvalidOp && >>> + s!=APFloat::opDivByZero)) { >>> return getConstantFP(V1, VT); >>> + } >>> break; >>> case ISD::FCOPYSIGN: >>> V1.copySign(V2); >>> Index: lib/CodeGen/TargetLoweringBase.cpp >>> ==================================================================>>> --- lib/CodeGen/TargetLoweringBase.cpp (revision 215148) >>> +++ lib/CodeGen/TargetLoweringBase.cpp (working copy) >>> @@ -705,6 +705,7 @@ >>> JumpIsExpensive = false; >>> PredictableSelectIsExpensive = false; >>> MaskAndBranchFoldingIsLegal = false; >>> + FloatingPointExceptions = true; >>> StackPointerRegisterToSaveRestore = 0; >>> ExceptionPointerRegister = 0; >>> ExceptionSelectorRegister = 0; >>> >>> >>> _______________________________________________ >>> LLVM Developers mailing list >>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >>> > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
Owen Anderson
2014-Aug-08 22:55 UTC
[LLVMdev] Proposal: Add a target lowering hook to state that target supports floating point exception behavior.
> On Aug 8, 2014, at 2:56 PM, Matt Arsenault <Matthew.Arsenault at amd.com> wrote: > > On 08/08/2014 02:51 PM, Owen Anderson wrote: >> I assume you meant to ask for ports that *don’t* support floating point exceptions. To my knowledge, neither R600 nor NVPTX support floating point exceptions. >> >> —Owen > SI at least does, although nothing is done with that currentlyEven if your hardware supports it, I’m pretty confident that you would want to compile with this option disabled for OpenGL shaders. There’s no mechanism for the user to detect the exception in the language or the API, so you’d rather just have the constant folding. —Owen