Tom Stellard
2014-Jul-02 16:23 UTC
[LLVMdev] Passing specific register for an Instruction in target description files.
On Mon, Jun 30, 2014 at 02:40:43AM -0700, Quentin Colombet wrote:> Hi Arsen, > > > > On Jun 19, 2014, at 10:43 PM, Arsen Hakobyan <artinetstudio at gmail.com> wrote: > > > > Hi all, > > > > I want to generate an assembly instruction for my target using target > > description representation of the instruction. The problem is that I want to > > add direct register to be chose as an output register for my target. Does it > > possible to do with an instruction definition in TARGETInstrInfo.td file? > > May be someone could help with an example? > > If I understood correctly, you want your instruction to define a specific register. > If yes, you can achieve this by creating a specialized singleton register class with the register you want and use it in the td file. > E.g., in yourTargetRegisterInfo.td: > def MyReg : RegisterClass<“MyTarget”, [Related Types], MySize, (add MyReg)>; > > in yourTargetInstrInfo.td: > def MyInstr […] (outs MyReg:$Rd) […] > > The ARM target does something similar for SP. Look for GPRsp. >If you use this approach, you may run into issues if the scheduler decides to put two instructions that write to this register class in a row. In this case you will either need to implement spilling or the register allocator will run out of registers. The other way to solves this is to use the CustomInserter to force the instruction to use the register you want. -Tom> Cheers, > -Quentin > > > > > Currently I have seen that we can pass the name of the registers' group, and > > direct registers as an implicit operands (with Uses or Defs) but I want to > > pass specific register. > > > > Thank you very much for your time, > > Arsen > > > > > > > > > > > > -- > > View this message in context: http://llvm.1065342.n5.nabble.com/Passing-specific-register-for-an-Instruction-in-target-description-files-tp69662.html > > Sent from the LLVM - Dev mailing list archive at Nabble.com. > > _______________________________________________ > > LLVM Developers mailing list > > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
Arsen Hakobyan
2014-Jul-02 18:15 UTC
[LLVMdev] Passing specific register for an Instruction in target description files.
Hi Tom, Thank you for the information! Actually I am using an approach you have suggested (if I am not misunderstood). I am generating a new SDNode then copying all the options and operands from the target SDNode replacing the operand with a new one but already using the required register. All this stuff I am doing in DAGtoDAG selection phase. But I think the other approach suggested by Quentin could be also convenient for my situation. I am not sure therefore I am just trying to get result with this approach too. (for now I have to resolve some other issues to get the final assembly code generated with this flow). I will post my results here when I will finish successfully. But If there will be other suggestion: any ideas are welcomed! Thanks, Arsen -- View this message in context: http://llvm.1065342.n5.nabble.com/Passing-specific-register-for-an-Instruction-in-target-description-files-tp69662p70127.html Sent from the LLVM - Dev mailing list archive at Nabble.com.
Tom Stellard
2014-Jul-02 20:00 UTC
[LLVMdev] Passing specific register for an Instruction in target description files.
On Wed, Jul 02, 2014 at 11:15:52AM -0700, Arsen Hakobyan wrote:> Hi Tom, > > Thank you for the information! > > Actually I am using an approach you have suggested (if I am not > misunderstood). I am generating a new SDNode then copying all the options > and operands from the target SDNode replacing the operand with a new one but > already using the required register. All this stuff I am doing in DAGtoDAG > selection phase. >I guess this would work too, but what I was suggesting was to use EmitInstrWithCustomInserter is called after ISel once the DAG has been converted to MachineInstrs. -Tom> But I think the other approach suggested by Quentin could be also convenient > for my situation. I am not sure therefore I am just trying to get result > with this approach too. (for now I have to resolve some other issues to get > the final assembly code generated with this flow). > > I will post my results here when I will finish successfully. > > But If there will be other suggestion: any ideas are welcomed! > > Thanks, > Arsen > > > > -- > View this message in context: http://llvm.1065342.n5.nabble.com/Passing-specific-register-for-an-Instruction-in-target-description-files-tp69662p70127.html > Sent from the LLVM - Dev mailing list archive at Nabble.com. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev