Yi Lin
2014-Feb-07 01:31 UTC
[LLVMdev] most optimised and lowest level IR before machine codegen?
Hi, I am interested to know how to get the most optimised IR (the compiler won't do any higher level opt but only translates it down to MC). I tried to emit LLVM IR in clang by using '-S -O3 -emit-llvm'. Then I tried to use 'opt' to optimise it, but it seems to produce the same code. Can I assume that LLVM will not do any code transformation on this level of IR but directly translate this IR into MC? Is there any internal lower-level IR that LLVM uses during the machine code generation? Thank you very much. Regards, Yi
Tim Northover
2014-Feb-07 08:17 UTC
[LLVMdev] most optimised and lowest level IR before machine codegen?
Hi Yi,> Can I assume that LLVM will not do any code transformation on this level of > IR but directly translate this IR into MC?There are a few passes that happen on IR even after this phase, but not many. The idea is that they're the passes that are more target-specific, though that's probably less true now than it was before. Giving "-print-after-all" to llc currently lists at least some of them. (I suspect it's skipping Loop strength reduction for some reason, but that definitely runs from llc).> Is there any internal lower-level IR that LLVM uses during the machine code > generation?Yes, after those few IR passes, the code is converted to MachineInstrs. The actual instructions are target-specific, and most of them represent CPU instructions in 1:1 correspondence, but there are a few pseudo-instructions there that may expand to more (or less). Lots more passes run on that representation (register allocation and scheduling being the most obvious). "-print-after-all" shows them too, and the IR-equivalent at each stage. Finally, the MachineInstrs get lowered to MCInsts and then printed and discarded almost immediately (to the extent that MCInsts tend to only exist on the stack; they don't stick around long enough to need heap allocation). Cheers. Tim.
Yi Lin
2014-Feb-07 09:42 UTC
[LLVMdev] most optimised and lowest level IR before machine codegen?
Thank you very much. Those are very helpful. Regards, Yi On 7/02/2014 7:17 PM, Tim Northover wrote:> Hi Yi, > >> Can I assume that LLVM will not do any code transformation on this level of >> IR but directly translate this IR into MC? > There are a few passes that happen on IR even after this phase, but > not many. The idea is that they're the passes that are more > target-specific, though that's probably less true now than it was > before. Giving "-print-after-all" to llc currently lists at least some > of them. > > (I suspect it's skipping Loop strength reduction for some reason, but > that definitely runs from llc). > >> Is there any internal lower-level IR that LLVM uses during the machine code >> generation? > Yes, after those few IR passes, the code is converted to > MachineInstrs. The actual instructions are target-specific, and most > of them represent CPU instructions in 1:1 correspondence, but there > are a few pseudo-instructions there that may expand to more (or less). > > Lots more passes run on that representation (register allocation and > scheduling being the most obvious). "-print-after-all" shows them too, > and the IR-equivalent at each stage. > > Finally, the MachineInstrs get lowered to MCInsts and then printed and > discarded almost immediately (to the extent that MCInsts tend to only > exist on the stack; they don't stick around long enough to need heap > allocation). > > Cheers. > > Tim.
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