Hi, I am trying to make my tablegen files more flexible and for that I would like to have a name that in the end will be replaced with a type. If tablegen would support c preprocssing, I would do it like this: --- #define myBaseType i32 ... def imm32 : Operand<myBaseType>; def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>; ... --- Is there a way to achieve something like this with tablegen ? Greetings, Jeroen Dobbelaere
Why not just run the c preprocessor before running tablegen? Micah> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Jeroen Dobbelaere > Sent: Wednesday, August 07, 2013 1:33 AM > To: llvmdev at cs.uiuc.edu > Subject: [LLVMdev] tablegen question > > Hi, > > I am trying to make my tablegen files more flexible and for that I would like > to have a name that in the end will be replaced with a type. > > If tablegen would support c preprocssing, I would do it like this: > > --- > #define myBaseType i32 > ... > def imm32 : Operand<myBaseType>; > def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>; ... > --- > > Is there a way to achieve something like this with tablegen ? > > Greetings, > > Jeroen Dobbelaere > > > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
That might be a possibility. In that case I'll need to avoid tablegen's include mechanism and replace them with a '#include'. I would also need to change the normal build rules so that the preprocessor is invoked (and that is something I would like to avoid ; ) ) Greetings, Jeroen> -----Original Message----- > From: Micah Villmow [mailto:micah.villmow at smachines.com] > Sent: Wednesday, August 07, 2013 10:50 AM > To: Jeroen Dobbelaere; llvmdev at cs.uiuc.edu > Subject: RE: tablegen question > > Why not just run the c preprocessor before running tablegen? > > Micah > > > -----Original Message----- > > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev- > bounces at cs.uiuc.edu] > > On Behalf Of Jeroen Dobbelaere > > Sent: Wednesday, August 07, 2013 1:33 AM > > To: llvmdev at cs.uiuc.edu > > Subject: [LLVMdev] tablegen question > > > > Hi, > > > > I am trying to make my tablegen files more flexible and for that I would like > > to have a name that in the end will be replaced with a type. > > > > If tablegen would support c preprocssing, I would do it like this: > > > > --- > > #define myBaseType i32 > > ... > > def imm32 : Operand<myBaseType>; > > def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>; ... > > --- > > > > Is there a way to achieve something like this with tablegen ? > > > > Greetings, > > > > Jeroen Dobbelaere > > > > > > > > > > > > _______________________________________________ > > LLVM Developers mailing list > > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
On Wed, Aug 7, 2013 at 1:32 AM, Jeroen Dobbelaere <Jeroen.Dobbelaere at synopsys.com> wrote:> Hi, > > I am trying to make my tablegen files more flexible and for that I would like to have a name that in the end will be replaced with > a type. > > If tablegen would support c preprocssing, I would do it like this: > > --- > #define myBaseType i32 > ... > def imm32 : Operand<myBaseType>; > def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>; > ... > --- > > Is there a way to achieve something like this with tablegen ?You could maybe define a class, def an instance at the top-level, and access the member you care about (using dot notation). Depending on how far you want to push it, things like #if trickery can be done using equivalent tablegen (!if, ..) when defining the instance. -- Ahmed> Greetings, > > Jeroen Dobbelaere > > > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev