Hello, It is a RISC with around 60 instructions like a 80c51 instruction set (without mul/div) and with Direct or indirect memory acces. There is a protected / user mode but the processor keep small and simple. 2009/11/23 Anton Korobeynikov <anton at korobeynikov.info>> Hello Guillaume, > > > - Is there estimation (from your experiences) of the work required to > > implement a backend for a simple 8bits micro controller architecture (1 > > men-month, 10 or 100 ?) > What is the instruction set of your microcontroller? How rich it is? > What is the architecture? Is it RISC-y? > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20091123/4cadb3ed/attachment.html>
Hello> It is a RISC with around 60 instructions like a 80c51 instruction set > (without mul/div) and with Direct or indirect memory acces.My estimate is something like a man-week for a person, who knows what to do :) I guess the instruction set is pretty similar to msp430's for which we already have a backend. In such situation you might just grab this backend, remove all 16-bit stuff (basically, 8 bit and 16 bit are quite "parallel" there) and tweak stuff a bit. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
Ok great news but as currently I don't have the "know what to do", it would probably take longer... I suppose your estimate only include backend update. Can I have more detail about the Simulator/Debugger part(at an assembler level?) ? I'm not sure if LLVM is able to provide such functionalities. 2009/11/23 Anton Korobeynikov <anton at korobeynikov.info>> Hello > > > It is a RISC with around 60 instructions like a 80c51 instruction set > > (without mul/div) and with Direct or indirect memory acces. > My estimate is something like a man-week for a person, who knows what to do > :) > > I guess the instruction set is pretty similar to msp430's for which we > already have a backend. In such situation you might just grab this > backend, remove all 16-bit stuff (basically, 8 bit and 16 bit are > quite "parallel" there) and tweak stuff a bit. > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20091123/c86e99e0/attachment.html>
On Monday 23 November 2009 09:01, Anton Korobeynikov wrote:> Hello > > > It is a RISC with around 60 instructions like a 80c51 instruction set > > (without mul/div) and with Direct or indirect memory acces. > > My estimate is something like a man-week for a person, who knows what to do > :)That's pretty optimistic, even for someone who knows what to do. The learning curve for TableGen is quite steep. I would budget at least a year for everything; learning TableGen, writing patterns, custom lowering, testing, etc. And that's for a relatively simple, orthogonal ISA. Of course this happens iteratively. You learn a little TableGen (mostly by looking at existing backends and asking lots of questions), write a few patterns, learn a little more and so on. -Dave