Roman Levenstein
2008-Apr-02 08:06 UTC
[LLVMdev] Goog test-cases for a new register allocator
Hi, As I mentioned some time ago on the mailing list, I'm working on the implementation of the Sarkar's Extended Linear Scan algorithm for LLVM. For testing and debugging of this algorithm, I need some good test-cases that check different functionalities of the register allocator, e.g.: - test-cases involving a lot of spilling - test-cases using pre-colored registers, e.g. like the EAX register used by the division instruction on X86 - test-cases making use of different (partially aliasing) register-classes at the same-time - test-cases where the caller-save vs callee-save choices of registers play a big role. I think these requirements are not specific for my allocator only, but are important for checking any register allocator. May be someone (Fernando? David? Evan?) who was working on register allocators has found a good set of examples covering some of the topics? Or may be someone knows good examples due to the fact that current register allocators perform too bad on it? ;-) Any help and ideas are appreciated! Thanks, - Roman Lesen Sie Ihre E-Mails jetzt einfach von unterwegs. www.yahoo.de/go
Fernando Magno Quintao Pereira
2008-Apr-02 16:55 UTC
[LLVMdev] Goog test-cases for a new register allocator
Hey, Roman, I have some tests that I used to debug my allocator. I will send them to you in a separate e-mail. best, Fernando> Hi, > > As I mentioned some time ago on the mailing list, I'm working on the > implementation of the Sarkar's Extended Linear Scan algorithm for LLVM. > > For testing and debugging of this algorithm, I need some good > test-cases that check different functionalities of the register > allocator, e.g.: > - test-cases involving a lot of spilling > - test-cases using pre-colored registers, e.g. like the EAX register > used by the division instruction on X86 > - test-cases making use of different (partially aliasing) > register-classes at the same-time > - test-cases where the caller-save vs callee-save choices of registers > play a big role. > > I think these requirements are not specific for my allocator only, but > are important for checking any register allocator. May be someone > (Fernando? David? Evan?) who was working on register allocators has > found a good set of examples covering some of the topics? Or may be > someone knows good examples due to the fact that current register > allocators perform too bad on it? ;-) > > Any help and ideas are appreciated! > > Thanks, > - Roman > > > > Lesen Sie Ihre E-Mails jetzt einfach von unterwegs. > www.yahoo.de/go > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >
On Wednesday 02 April 2008 03:06, Roman Levenstein wrote:> Hi, > > As I mentioned some time ago on the mailing list, I'm working on the > implementation of the Sarkar's Extended Linear Scan algorithm for LLVM.Cool!> For testing and debugging of this algorithm, I need some good > test-cases that check different functionalities of the register > allocator, e.g.: > - test-cases involving a lot of spilling > - test-cases using pre-colored registers, e.g. like the EAX register > used by the division instruction on X86 > - test-cases making use of different (partially aliasing) > register-classes at the same-time > - test-cases where the caller-save vs callee-save choices of registers > play a big role. > > I think these requirements are not specific for my allocator only, but > are important for checking any register allocator. May be someone > (Fernando? David? Evan?) who was working on register allocators has > found a good set of examples covering some of the topics? Or may be > someone knows good examples due to the fact that current register > allocators perform too bad on it? ;-)I've found the NAS Parallel Benchmarks to be quite a good workout: http://www.nas.nasa.gov/Resources/Software/npb.html They are medium-sized benchmarks, so substantial without being totally overwhelming. They manifest pretty much all of your points above. The basic linear scan algorithm seems to do fairly well on them so it makes for a good comparison. I use version 2.3, the serial flavor (yes, I understand the irony :) ). -Dave
On Wednesday 02 April 2008 18:47, David Greene wrote:> I've found the NAS Parallel Benchmarks to be quite a good workout:Of course, this is with our optimizer, which does an amazingly good job of creating register pressure. :) YMMV. -Dave
Chris Lattner
2008-Apr-03 02:58 UTC
[LLVMdev] Goog test-cases for a new register allocator
On Apr 2, 2008, at 4:47 PM, David Greene wrote:>> I think these requirements are not specific for my allocator only, >> but >> are important for checking any register allocator. May be someone >> (Fernando? David? Evan?) who was working on register allocators has >> found a good set of examples covering some of the topics? Or may be >> someone knows good examples due to the fact that current register >> allocators perform too bad on it? ;-) > > I've found the NAS Parallel Benchmarks to be quite a good workout: > > http://www.nas.nasa.gov/Resources/Software/npb.html > > They are medium-sized benchmarks, so substantial without being totally > overwhelming. They manifest pretty much all of your points above. > The > basic linear scan algorithm seems to do fairly well on them so it > makes > for a good comparison. > > I use version 2.3, the serial flavor (yes, I understand the > irony :) ).Could these be added to llvm-test? -Chris
Roman Levenstein
2008-Apr-04 08:12 UTC
[LLVMdev] Goog test-cases for a new register allocator
Hi everyone, Thanks for all answers, proposals and test-cases I got for testing my Extended Linear Scan register allocator. Special thanks to Fernando and David for providing very concrete test-cases and scripts! -Roman --- David Greene <dag at cray.com> schrieb:> On Wednesday 02 April 2008 03:06, Roman Levenstein wrote: > > Hi, > > > > As I mentioned some time ago on the mailing list, I'm working on > the > > implementation of the Sarkar's Extended Linear Scan algorithm for > LLVM. > > Cool! > > > For testing and debugging of this algorithm, I need some good > > test-cases that check different functionalities of the register > > allocator, e.g.: > > - test-cases involving a lot of spilling > > - test-cases using pre-colored registers, e.g. like the EAX > register > > used by the division instruction on X86 > > - test-cases making use of different (partially aliasing) > > register-classes at the same-time > > - test-cases where the caller-save vs callee-save choices of > registers > > play a big role. > > > > I think these requirements are not specific for my allocator only, > but > > are important for checking any register allocator. May be someone > > (Fernando? David? Evan?) who was working on register allocators has > > found a good set of examples covering some of the topics? Or may be > > someone knows good examples due to the fact that current register > > allocators perform too bad on it? ;-) > > I've found the NAS Parallel Benchmarks to be quite a good workout: > > http://www.nas.nasa.gov/Resources/Software/npb.html > > They are medium-sized benchmarks, so substantial without being > totally > overwhelming. They manifest pretty much all of your points above. > The > basic linear scan algorithm seems to do fairly well on them so it > makes > for a good comparison. > > I use version 2.3, the serial flavor (yes, I understand the irony :) > ). > > -Dave > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >Lesen Sie Ihre E-Mails jetzt einfach von unterwegs. www.yahoo.de/go