llvm dev - Jan 2008 - [LLVMdev] Still Another LiveInterval Question

Ok, so I'm delving much more deeply into this stuff.  :)

On a target like x86, is it true to say that for virtual registers post 
phi-elimination, the only  time their live intervals should have more than one 
value number is if they participate in 2-address instructions where a copy had 
to be introduced to satisfy the read-write requirements of the instruction?  
And further, in that  case, LiveIntervals for virtual registers should only 
have at most two value numbers?

How about on targets without these reuiqrements?  Should LiveIntervals for 
virtual registers only ever have one value number?

                                               -Dave

On Jan 17, 2008, at 2:06 PM, David Greene wrote:
> Ok, so I'm delving much more deeply into this stuff.  :)
>
> On a target like x86, is it true to say that for virtual registers  
> post
> phi-elimination, the only  time their live intervals should have  
> more than one
> value number is if they participate in 2-address instructions where  
> a copy had
> to be introduced to satisfy the read-write requirements of the  
> instruction?
> And further, in that  case, LiveIntervals for virtual registers  
> should only
> have at most two value numbers?
That's true only before coalescing. After coalescing, you will  
frequently see intervals but more valno's.
>
>
> How about on targets without these reuiqrements?  Should  
> LiveIntervals for
> virtual registers only ever have one value number?
Again, true but only before coalescing.

Evan
>
>
>                                               -Dave
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