Alireza.Moshtaghi at microchip.com
2007-Oct-01 18:33 UTC
[LLVMdev] Lowering operations to 8-bit!
So does that mean that LLVM can't lower automatically to 8-bit values? I tried defining 8-bit pointers in the subtarget using "p:8:8:8" but it asserts at line 566 of TargetData.cpp in the default case of TargetData::getIntPtrType() Is it difficult to add 8-bit support? A. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Chris Lattner Sent: Friday, September 28, 2007 5:01 PM To: LLVM Developers Mailing List Subject: Re: [LLVMdev] Lowering operations to 8-bit! On Sep 28, 2007, at 4:53 PM, <Alireza.Moshtaghi at microchip.com> <Alireza.Moshtaghi at microchip.com> wrote:> ExpandOp is not called at all. > In SelectionDAGLegalize::HandleOp() only the ValueType is > considered in > the switch statement to decide if it is legal or promote or expand. > As I trace back (correct me if I'm wrong) these values are set in > TargetLowering::computeRegisterProperties() and it is based on the > largest register class (in my case the smallest possible pointer size, > 16-bit) > So it reduces everything down to 16-bit and pretty much ignores the > fact > that ADD of i16 is supposed to be expanded. > > Am I doing the right analysis?Yes. It sounds like the codegen is assuming the pointer type is valid in computeRegisterProperties or something. Somehow i16 is getting marked as legal. -Chris _______________________________________________ LLVM Developers mailing list LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
On Oct 1, 2007, at 11:33 AM, Alireza.Moshtaghi at microchip.com wrote:> So does that mean that LLVM can't lower automatically to 8-bit values?There is no inherent reason. LLVM should be able to lower to 8-bit values. It's probably a bug somewhere. In TargetLowering.h: bool isTypeLegal(MVT::ValueType VT) const { return !MVT::isExtendedVT(VT) && RegClassForVT[VT] != 0; } Is there a 16-bit register class?> I tried defining 8-bit pointers in the subtarget using "p:8:8:8" > but it > asserts at line 566 of TargetData.cpp in the default case of > TargetData::getIntPtrType()Dunno why it's like this. Can you add case 1: return Type::Int8Ty? Does it work / help? Evan> > Is it difficult to add 8-bit support? > > A. > > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Chris Lattner > Sent: Friday, September 28, 2007 5:01 PM > To: LLVM Developers Mailing List > Subject: Re: [LLVMdev] Lowering operations to 8-bit! > > > On Sep 28, 2007, at 4:53 PM, <Alireza.Moshtaghi at microchip.com> > <Alireza.Moshtaghi at microchip.com> wrote: > >> ExpandOp is not called at all. >> In SelectionDAGLegalize::HandleOp() only the ValueType is >> considered in >> the switch statement to decide if it is legal or promote or expand. >> As I trace back (correct me if I'm wrong) these values are set in >> TargetLowering::computeRegisterProperties() and it is based on the >> largest register class (in my case the smallest possible pointer >> size, >> 16-bit) >> So it reduces everything down to 16-bit and pretty much ignores the >> fact >> that ADD of i16 is supposed to be expanded. >> >> Am I doing the right analysis? > > Yes. It sounds like the codegen is assuming the pointer type is > valid in computeRegisterProperties or something. Somehow i16 is > getting marked as legal. > > -Chris > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
Alireza.Moshtaghi at microchip.com
2007-Oct-03 22:21 UTC
[LLVMdev] Lowering operations to 8-bit!
Thank you Evan, I added the return Type::Int8Ty to the switch statement to get it to work. I don't know if this can have other consequences, I haven't yet verified if the generated Legalized DAG is correct though. A. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Evan Cheng Sent: Monday, October 01, 2007 3:23 PM To: LLVM Developers Mailing List Subject: Re: [LLVMdev] Lowering operations to 8-bit! On Oct 1, 2007, at 11:33 AM, Alireza.Moshtaghi at microchip.com wrote:> So does that mean that LLVM can't lower automatically to 8-bit values?There is no inherent reason. LLVM should be able to lower to 8-bit values. It's probably a bug somewhere. In TargetLowering.h: bool isTypeLegal(MVT::ValueType VT) const { return !MVT::isExtendedVT(VT) && RegClassForVT[VT] != 0; } Is there a 16-bit register class?> I tried defining 8-bit pointers in the subtarget using "p:8:8:8" > but it > asserts at line 566 of TargetData.cpp in the default case of > TargetData::getIntPtrType()Dunno why it's like this. Can you add case 1: return Type::Int8Ty? Does it work / help? Evan> > Is it difficult to add 8-bit support? > > A. > > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Chris Lattner > Sent: Friday, September 28, 2007 5:01 PM > To: LLVM Developers Mailing List > Subject: Re: [LLVMdev] Lowering operations to 8-bit! > > > On Sep 28, 2007, at 4:53 PM, <Alireza.Moshtaghi at microchip.com> > <Alireza.Moshtaghi at microchip.com> wrote: > >> ExpandOp is not called at all. >> In SelectionDAGLegalize::HandleOp() only the ValueType is >> considered in >> the switch statement to decide if it is legal or promote or expand. >> As I trace back (correct me if I'm wrong) these values are set in >> TargetLowering::computeRegisterProperties() and it is based on the >> largest register class (in my case the smallest possible pointer >> size, >> 16-bit) >> So it reduces everything down to 16-bit and pretty much ignores the >> fact >> that ADD of i16 is supposed to be expanded. >> >> Am I doing the right analysis? > > Yes. It sounds like the codegen is assuming the pointer type is > valid in computeRegisterProperties or something. Somehow i16 is > getting marked as legal. > > -Chris > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev_______________________________________________ LLVM Developers mailing list LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev