[Xen-devel] [PATCH] Add support for Pause Filtering to AMD SVM

Mark Langsdorf
Fri, 01 May 2009 16:10:36 -0000

New AMD processors will support the Pause Filter Feature.
This feature creates a new field in the VMCB called Pause
Filter Count.  If Pause Filter Count is greater than 0 and
ntercepting PAUSEs is enabled, the processor will increment
an internal counter when a PAUSE instruction occurs instead
of intercepting.  When the internal counter reaches the
Pause Filter Count value, a PAUSE intercept will occur.

This feature can be used to detect contended spinlocks,
especially when the lock holding VCPU is not scheduled.
Rescheduling another VCPU prevents the VCPU seeking the
lock from wasting its quantum by spinning idly.

Experimental results show that most spinlocks are held
for less than 1000 PAUSE cycles or more than a few
thousand.  Default the Pause Filter Counter to 3000 to
detect the contended spinlocks.

Processor support for this feature is indicated by a CPUID
bit.

On a 24 core system running 4 guests each with 16 VCPUs,
this patch improved overall performance of each guest''s
32 job kernbench by approximately 1%.  Further performance
improvement may be possible with a more sophisticated
yield algorithm.

-Mark Langsdorf
Operating System Research Center
AMD

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>

diff -r 531815546880 xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c	Wed Apr 29 06:07:28 2009 -0500
+++ b/xen/arch/x86/hvm/svm/svm.c	Fri May 01 04:12:17 2009 -0500
@@ -1422,6 +1422,14 @@ asmlinkage void svm_vmexit_handler(struc
         vmcb->interrupt_shadow = 1;
         break;

+    case VMEXIT_PAUSE:
+        /*
+         * The guest is running a contended spinlock and we''ve
detected it.
+         * Do something useful, like reschedule the guest
+         */
+       do_sched_op_compat(SCHEDOP_yield, 0);
+       break;
+
     default:
     exit_and_crash:
         gdprintk(XENLOG_ERR, "unexpected VMEXIT: exit reason = 0x%x,
"
diff -r 531815546880 xen/arch/x86/hvm/svm/vmcb.c
--- a/xen/arch/x86/hvm/svm/vmcb.c	Wed Apr 29 06:07:28 2009 -0500
+++ b/xen/arch/x86/hvm/svm/vmcb.c	Fri May 01 04:12:17 2009 -0500
@@ -39,6 +39,8 @@
 #include <xen/keyhandler.h>

 extern int svm_dbg_on;
+#define DEFAULT_PAUSE_FILTER 3000
+uint32_t pause_filter_count = DEFAULT_PAUSE_FILTER;

 #define IOPM_SIZE   (12 * 1024)
 #define MSRPM_SIZE  (8  * 1024)
@@ -247,6 +249,12 @@ static int construct_vmcb(struct vcpu *v
         vmcb->exception_intercepts |= (1U << TRAP_page_fault);
     }

+    if ( cpu_has_pause_filter)
+    {
+        vmcb->pause_filter_count = DEFAULT_PAUSE_FILTER;
+        vmcb->general1_intercepts |= GENERAL1_INTERCEPT_PAUSE;
+    }
+
     return 0;
 }

diff -r 531815546880 xen/include/asm-x86/hvm/svm/svm.h
--- a/xen/include/asm-x86/hvm/svm/svm.h	Wed Apr 29 06:07:28 2009 -0500
+++ b/xen/include/asm-x86/hvm/svm/svm.h	Fri May 01 04:12:17 2009 -0500
@@ -67,10 +67,12 @@ extern u32 svm_feature_flags;
 #define SVM_FEATURE_LBRV    1
 #define SVM_FEATURE_SVML    2
 #define SVM_FEATURE_NRIPS   3
+#define SVM_FEATURE_PAUSEF  10

 #define cpu_has_svm_npt     test_bit(SVM_FEATURE_NPT, &svm_feature_flags)
 #define cpu_has_svm_lbrv    test_bit(SVM_FEATURE_LBRV, &svm_feature_flags)
 #define cpu_has_svm_svml    test_bit(SVM_FEATURE_SVML, &svm_feature_flags)
 #define cpu_has_svm_nrips   test_bit(SVM_FEATURE_NRIPS, &svm_feature_flags)
+#define cpu_has_pause_filter  test_bit(SVM_FEATURE_PAUSEF,
&svm_feature_flags)

 #endif /* __ASM_X86_HVM_SVM_H__ */
diff -r 531815546880 xen/include/asm-x86/hvm/svm/vmcb.h
--- a/xen/include/asm-x86/hvm/svm/vmcb.h	Wed Apr 29 06:07:28 2009 -0500
+++ b/xen/include/asm-x86/hvm/svm/vmcb.h	Fri May 01 04:12:17 2009 -0500
@@ -375,7 +375,9 @@ struct vmcb_struct {
     u64 res03;                  /* offset 0x20 */
     u64 res04;                  /* offset 0x28 */
     u64 res05;                  /* offset 0x30 */
-    u64 res06;                  /* offset 0x38 */
+    u32 res06;                  /* offset 0x38 */
+    u16 res06a;                 /* offset 0x3C */
+    u16 pause_filter_count;     /* offset 0x3E */
     u64 iopm_base_pa;           /* offset 0x40 */
     u64 msrpm_base_pa;          /* offset 0x48 */
     u64 tsc_offset;             /* offset 0x50 */


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