[vorbis-dev] How many MIPS for Vorbis Decoder?

John Ripley
Fri, 19 Mar 2004 10:20:34 -0000

> From: Jens Prüfer [mailto:jens.pruefer@gmx.de]
> Sent: 19 March 2004 17:31
> To: vorbis-dev@xiph.org
> Subject: Re: [vorbis-dev] How many MIPS for Vorbis Decoder?
>
> > What's this intended for anyway - low power, small form
> factor, or low
> > cost?
>
> Ultra-Low-Cost! Definately. Low power would also be nice. I
> was thinking of
> one of the TI MSP430's maybe? But when I read "200 MHz Strong
> ARM" my heart
> skips. But more MHz does not necessarily mean more Speed. The
> MSP430F169 has
> a MAC unit as well, making those nasty multiplications cheap
> (1 cycle only). But it only does 8 MIPS :(

Yikes. That's really low. I can't actually find any MDCT or FFT
references
on TI's site... so I don't know how efficient it would be. A brief scan
of
the user guide reveals that it's also restricted to a 16 bit address space,
but if that means 128KB, it's probably going to fit. Sounds like a lot of
porting is required, though, if it will actually work.

If you're looking for ultra-low-cost that probably rules out anything ARM
based. (Grumble - ARM cores are great but they're always too damn
expensive). You don't need anything as powerful (or expensive) as a
StrongARM, but there's plenty of other microcontrollers around that might do
the job a bit less marginally. Don't forget development time when you
compare these things for cost :)

If you can find a figure for how fast that DSP performs MDCTs (i.e number of
clocks for a block size), that would help.