similar to: PNG file don't run on mac's?

Dear R users, My question is about finding the proper font size for graphics. For this i had written a code that creats 4 diferent graphics and saves them as a png file. >From these PNG.graphics , i select one of the proper size and past it to a word document. I have experimented with lots of settings yet:nd lost my track a bit. there are cex; cexaxis cexlabes and so on, i lost track of

Dear R users, My question is about finding the proper font size for graphics. For this i had written a code that creats 4 diferent graphics and saves them as a png file. >From these PNG.graphics , i select one of the proper size and past it to a word document. I have experimented with lots of settings yet:nd lost my track a bit. there are cex; cexaxis cexlabes and so on, i lost track of

Hi guys, As we discussed in the last CentOS SIG Virt meeting below the steps that we do to rebuild the qemu-kvm from http://vault.centos.org to enable the rhev-features like live snapshot for CentOS. 1. Download the last qemu-kvm from http://vault.centos.org/${version}/updates/Source/SPackages/ 2. mock -D "${build_version}" -r epel-6-x86_64 --with=rhev-features --rebuild

Hello! Since experiments on my testserver two days ago /var/spool/postfix/private/dovecot-lmtp is not created anymore. This the setting in /etc/dovecot/conf.d/10-master.conf service lmtp { unix_listener /var/spool/postfix/private/dovecot-lmtp { group = postfix mode = 0600 user = postfix } } I searched nearly the whole system for lmtp but can't find the reason why. What can

I am new to Rails and Ruby, and to OO languages, and seem to be making a very silly mistake somewhere here. Can anybody help? I am trying to write an application which involves ''exercises'', each of which consists of several ''templates''. This is based on MySQL tables with these names. I have models and controllers, built with the Rails Scaffold, for both

Hi, Nux! Can you re-paste this cfg? The url is outdated. - robin On Tue, Dec 30, 2014 at 2:30 AM, Nux! <nux at li.nux.ro> wrote: > Hi, > > Here's how my epel-7-i386.cfg mock file looks like: > http://fpaste.org/164110/19877702/raw/ > > Do note the 32bit packages are unofficial and unsupported. RedHat does not > support 32bit in EL7. > > HTH > Lucian >

Hi, I was looking around the LLVM instruction set and I failed to find ROL and ROR instructions. Is there any plans on adding these instructions to LLVM? The reason that I am asking is for cryptographical algorithms which are becoming ever more important rotation is a major operation. Thus including such instruction could reduce 3 instructions {shl, shr, or} into {rol | ror} which could gain

On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > On Feb 3, 2009, at 2:28 PM, Kasra wrote: >> I was looking around the LLVM instruction set and I failed to find >> ROL and ROR instructions. Is there any plans on adding these >> instructions to LLVM? > > Not sure what you mean: He's referring to the LLVM IR, I think, and it's true that doesn't have

--- On Tue, 2/3/09, Bill Wendling <isanbard at gmail.com> wrote: > From: Bill Wendling <isanbard at gmail.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Cc: kasra_n500 at yahoo.com > Date: Tuesday, February 3, 2009, 2:52 PM > On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen

On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen <dalej at apple.com> wrote: > > On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > >> On Feb 3, 2009, at 2:28 PM, Kasra wrote: >>> I was looking around the LLVM instruction set and I failed to find >>> ROL and ROR instructions. Is there any plans on adding these >>> instructions to LLVM? >>

Hi all. Unfortunately, the existing quota-fs does not know how to get GROUP quota with NFS storage. But there is a tool for Linux quota-tools (http://slackware.rol.ru/slackware/slackware-12.2/source/a/quota/). This patch is made on the basis quota-tools. The patch was successful alpha testing. Suggestions and comments are welcome. -------------- next part -------------- An embedded and

Dear All, I am trying to custom lower 32-bit ISD::SHL and SHR in a backend for 6502 family CPUs. The particular subtarget has 16-bit registers at most, so a 32-bit result is not legal. Normally, if you mark this as "Legal" or "Expand", then it will expand the node into a more nodes as follows in an example: shl i32 %a , 2 => high_sdvalue = (or (shr %b, 14), (shl %c, 2) )

On Feb 3, 2009, at 2:28 PM, Kasra wrote: > I was looking around the LLVM instruction set and I failed to find > ROL and ROR instructions. Is there any plans on adding these > instructions to LLVM? Not sure what you mean: $ cat t.c unsigned int rol(unsigned int i) { return i << 1 | i >> 31; } mrs $ clang -S t.c -O2 mrs $ cat t.s .text .align 4,0x90 .globl _rol

On Feb 3, 2009, at 3:54 PM, Kasra wrote: > I guess the backends could know about the instructions. But I am not > convinced why it is beneficial not to have ROR and ROL instructions > within llvm. > How would it be beneficial to have them, if we already generate them at the target level properly? Adding instructions "just because" doesn't seem wise. -Owen

Hola, gracias por la respuesta. Yo también puedo descargar el fichero pero no lo carga de forma correcta: > drive_download(" https://drive.google.com/file/d/1iN7rT-W8WoXsdBpKzxcatFx7nGPWNkuz/view?usp=sharing ", + overwrite = TRUE, verbose = TRUE) File downloaded: * restaurant.RData Saved locally as: * restaurant.RData > restaurant <-

Hola, gracias por la respuesta, No me funcionó debido a que los nombres de las variables no están seriadas, es decir, los nombres de las variables son del tipo: x23 x25 x30, x301 x320, x80. Entonces me da este error: Error in eval(predvars, data, env) : object 'pot24' not found. Debido a que pot24 no existe, ya que de pot23 se brinca a pot30. En Stata es algo muy simple de hacer, solo

--- On Tue, 2/3/09, Owen Anderson <resistor at mac.com> wrote: > From: Owen Anderson <resistor at mac.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Date: Tuesday, February 3, 2009, 4:20 PM > On Feb 3, 2009, at 3:54 PM, Kasra wrote: > > I guess the

I forgot to mention that I used EXTRACT_ELEMENT in my backend to get the high and low parts of an SDValue. On 10 Nov 2013, at 17:50, Steve Montgomery <stephen.montgomery3 at btinternet.com> wrote: > I had a similar problem with a backend for the 68HC12 family which also has no barrel shifter. Some 68HC12 CPUs support shift for just one of the 16-bit registers and only support rotation

Hola, Quiero especificar una ecuación con varias variables explicativas de una manera eficiente sin necesidad de escribir todas y cada una. Tengo un conjunto de variables (junto con otras) dentro de una base de datos que se llaman pot23 pot311 pot312 pot 316 pot317........... pot80. No necesariamente están secuenciadas. Quisiera saber cómo indicar que incluya todas las variables de pot23 a pot80

>> Are you sure there isn't any test coverage? As far as I can tell, the tests from https://reviews.llvm.org/rL133503 are still in the tree. I looked at those, but none of them include the full pattern that decomposes into bswap and rol. I debugged through the X86 bswap.ll test and verified none of those cases make it through MatchBSwapHWord (they get handled in MatchBSwapHWordLow