Displaying 20 results from an estimated 20000 matches similar to: "stack multiple plots on one page"
2007 Oct 10
3
save lm output into vectors
Hi,
May I ask how I can save the coefficients and the p values into a table?
thanks.
jiong
The email message (and any attachments) is for the sole...{{dropped:11}}
2007 Oct 09
2
regression by groups
Hi All,
I want to run regression (lm) on my dependant variable by gender and race. How do I integrate the "by" function in lm?
thanks.
jiong
The email message (and any attachments) is for the sole...{{dropped:11}}
2007 Jun 27
2
running saved scripts
Hi All,
I have a rather naive question. I need to run some simple calculations
such as read.table, resid, and quantile on a data file. How can I save
these commands in a text file and ask R to run this text file? Thanks.
Jiong Zhang
The email message (and any attachments) is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use,
2007 Aug 17
2
problem using "rank"
Hi All,
I had 12766 elements in a column, 12566 are values and 200 are "NA"s. I used the following line to get the ranks:
total_list$MB.rank <- rank(-total_list$MB,ties.method="min",na.last=NA)
but I got an error message:
Error in `$<-.data.frame`(`*tmp*`, "BCRP_PW_F.rank", value = c(3949, 6182, :
replacement has 12199 rows, data has 12766
What
2007 Jun 11
3
if statement
Hi all,
I have a rather naive question. I have the height of 100 individuals in
a table and I want to assign the tallest 30% as Case=1 and the bottom
30% as Case=0. How do I do that?
thanks.
jiong
The email message (and any attachments) is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is
2013 Mar 23
3
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled
on 2013/3/23 1:52, Chris Lattner wrote:
> On Mar 19, 2013, at 8:58 PM, Jiong Wang <jiwang at tilera.com> wrote:
>
>> Hi Chris,
>>
>> could you please comment on committing TILE-Gx backend into community?
> Hi Jiong,
>
> I don't have any special advice here. It sounds like the general functionality level is high enough. Taking it into mainline sounds
2013 Mar 23
0
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled
On 03/23/2013 10:51 AM, Jiong Wang wrote:
> on 2013/3/23 1:52, Chris Lattner wrote:
>> On Mar 19, 2013, at 8:58 PM, Jiong Wang <jiwang at tilera.com> wrote:
>>
>>> Hi Chris,
>>>
>>> could you please comment on committing TILE-Gx backend into community?
>> Hi Jiong,
>>
>> I don't have any special advice here. It sounds like the
2013 Mar 22
0
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled
On Mar 19, 2013, at 8:58 PM, Jiong Wang <jiwang at tilera.com> wrote:
> Hi Chris,
>
> could you please comment on committing TILE-Gx backend into community?
Hi Jiong,
I don't have any special advice here. It sounds like the general functionality level is high enough. Taking it into mainline sounds great, so long as it is reviewed by someone.
-Chris
>
>
>
2013 Mar 08
0
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor
On 03/08/2013 04:48 AM, Dmitri Gribenko wrote:
> On Thu, Mar 7, 2013 at 6:33 PM, Jiong Wang <jiwang at tilera.com> wrote:
>> Hi all,
>>
>> Updated the patches for TILE-Gx backend:
>>
>> 1. added initial regression tests for tilegx codegen.
>> 2. added initial regression tests for MC Layer.
>> 3. fixed those commenting style issues.
>>
2013 Mar 01
0
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
----- Original Message -----
> From: "Jiong Wang" <jiwang at tilera.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, cfe-dev at cs.uiuc.edu
> Sent: Friday, March 1, 2013 1:34:15 AM
> Subject: Re: [LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
>
2013 Mar 03
0
[LLVMdev] AESOP autoparallelizing compiler
On 03/03/2013 02:09 PM, Timothy Mattausch Creech wrote:
> Hi,
> We would like to inform the community that we're releasing a version of our research compiler, "AESOP", developed at UMD using LLVM. AESOP is a distance-vector-based autoparallelizing compiler for shared-memory machines. The source code and some further information is available at
>
>
2013 Apr 11
0
[LLVMdev] Migration from JIT to MCJIT
Thanks, Eran.
I’m not sure how soon I’ll have a solution for you, but it’s on my to-do list now. I’ll also create a bugzilla record for this problem.
-Andy
From: Weiss, Eran [mailto:Eran.Weiss at emc.com]
Sent: Thursday, April 11, 2013 12:40 AM
To: Kaylor, Andrew
Cc: llvmdev at cs.uiuc.edu; Jim Grosbach; Jiong Wang
Subject: Re: [LLVMdev] Migration from JIT to MCJIT
Andrew,
I've attached
2013 Mar 01
3
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
On 03/01/2013 02:57 PM, Hal Finkel wrote:
Hi Hal,
thanks for feedback.
> Jiong, I am happy to see the Tile backend being offered for upstream inclusion. Among other things, in the long run, this may help inform and motivate many-core capabilities in LLVM.
>
> First, can you elaborate on the future maintenance and development plans for the target code? Do you plan to add SIMD support?
2013 Mar 20
2
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled
Hi Chris,
could you please comment on committing TILE-Gx backend into community?
========== TILE-Gx Status ===========
Features Supported
===
1. general function.
2. PIC/TLS/JumpTable.
3. Instructoin Bundling for VLIW.
4. Asm Parser
5. MC Layer (aware of instruction bundle), MCJIT support.
6. Initial regression tests for CodeGen & MC Layer.
Regression Result
===
Expected Passes : 13363
2013 Apr 11
2
[LLVMdev] Migration from JIT to MCJIT
Andrew,
I've attached a small reproduction of the issue.
Reproduce by:
$ /usr/bin/g++ `llvm-config --cxxflags` -g -m32 -c mcjit_external_symbol.cpp
$ /usr/bin/g++ `llvm-config --ldflags` -g -m32 -o mcjit_external_symbol mcjit_external_symbol.o `llvm-config --libs all`
$ ./mcjit_external_symbol
verifying...
LLVM ERROR: Program used external function '_external' which could not be
2013 Mar 01
2
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
On 03/01/2013 10:42 PM, Hal Finkel wrote:
>
> As some of the llvm modules are in active development, for example MC
> Layer, we want to return code to community repository first, so that
> it will be easy to keep pace with llvm main tree.
> I think this makes sense; but my impression is that the community will want a clear idea that this will be maintained and improved for the
2013 Mar 02
3
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
On 03/02/2013 04:50 AM, Dmitri Gribenko wrote:
> You also need tests for Clang bits, too.
>
> Mechanical issues:
>
> +/// getTileRegisterNumbering - Given the enum value for some register,
> +/// return the number that it corresponds to.
>
> Please don't duplicate function and class name in comments. Existing
> code does this, but current style guidelines advise not
2013 Apr 11
0
[LLVMdev] Migration from JIT to MCJIT
Eran,
Is there any chance you could boil this down to a small reproducer?
I’ve got a mid-to-long-term goal of getting rid of the ugliness in LLDB that Jim mentioned, and fixing your problem would be a good first step.
Thanks,
Andy
From: Jim Grosbach [mailto:grosbach at apple.com]
Sent: Wednesday, April 10, 2013 4:19 PM
To: Kaylor, Andrew; Jiong Wang
Cc: Weiss, Eran; llvmdev at cs.uiuc.edu
2013 Mar 07
2
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor
On Thu, Mar 7, 2013 at 6:33 PM, Jiong Wang <jiwang at tilera.com> wrote:
> Hi all,
>
> Updated the patches for TILE-Gx backend:
>
> 1. added initial regression tests for tilegx codegen.
> 2. added initial regression tests for MC Layer.
> 3. fixed those commenting style issues.
>
> please review, thanks.
This is a huge patch, and reviewing it in tar.gz is hard. To
2013 Mar 01
0
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
----- Original Message -----
> From: "Jiong Wang" <jiwang at tilera.com>
> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, cfe-dev at cs.uiuc.edu
> Sent: Thursday, February 28, 2013 6:09:20 PM
> Subject: [LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
>
> Hi,
>
> On behalf of Tilera Corporation,