similar to: Showing which bars in a bar chart are significantly different

Displaying 20 results from an estimated 300 matches similar to: "Showing which bars in a bar chart are significantly different"

2006 Sep 23
6
Connection to backgroundrb is lost when exiting action method
Hey. I have a very annoying problem, and was wondering what is wrong. Suppose I have backgroundrb running, and then I have an action in some controller. In the action I define a worker. When leaving the action, suddenly the connection to backgroundrb is lost: DRb URI: druby://localhost:22222 Pid: 3976 Autostart... done druby://localhost:42531 - #<Errno::EBADF: Bad file descriptor -
2011 Jan 03
3
Distorted output in fixed-point AEC
Hi, I couldn't find a discussion that specifically addresses this, so here it is. I'm using Speex AEC in my mobile VoIP application to cancel speaker echo. The used version is 1.2rc1 from the website, and I'm compiling with fixed-point. On most occasions, the AEC works very well and cancels most of the echo (combined with the preprocessor). On some devices, where the microphone signal
2016 Nov 20
3
RFC: Insertion of nops for performance stability
Hi Hal, A pre-emit pass will indeed be preferable. I originally thought of it, too, however I could not figure out how can such a pass have an access to information on instruction sizes and block alignments. I know that for X86, at least, the branch relaxation is happening during the layout phase in the Assembler, where I plan to integrate the nop insertion such that the new MCPerfNopFragment
2016 Nov 21
2
RFC: Insertion of nops for performance stability
Hi Hal, Thanks for the reference. I’ve looked at PPCBranchSelector and the PowerPC backend. It is very different from the X86 architecture and unfortunately the way branch relaxation and alignment related issues are handled in PPC cannot be copied to X86. This is because: 1. PPC instructions are of fixed length while X86 instructions are of variable length, and their length can change
2011 Jan 08
1
Distorted output in fixed-point AEC
Hi Jean-Marc, thanks for the response. First, I will clarify again that floating-point solves this - so isn't that a bug in fixed-point? Also, I understand that algorithmically the AEC won't cancel echo properly on a non-linear signal, but why completely distort the output? If the echo just won't get cancelled it would be acceptable, but in the current state it disables the ability to
2012 Nov 16
3
How to activate all VPCUS for a domU?
Hi, I have set maxvcpus and vcpus options in my domU configuration file, and I can see that X number of vcpu are set for the domU. I tried to activate all the vpcus by using vpcu_avail option (using decimal to represent vpcu bitmask e.g. 24=11000) but it doesn''t seem to work, and only the first vpcu is activated (i.e. has -b- state) while all other vpcu''s set for the domU are
2012 Nov 16
3
How to activate all VPCUS for a domU?
Hi, I have set maxvcpus and vcpus options in my domU configuration file, and I can see that X number of vcpu are set for the domU. I tried to activate all the vpcus by using vpcu_avail option (using decimal to represent vpcu bitmask e.g. 24=11000) but it doesn''t seem to work, and only the first vpcu is activated (i.e. has -b- state) while all other vpcu''s set for the domU are
2012 Feb 24
3
[LLVMdev] CodeGen instructions and patterns
Is there a generic function that gives the machine instructions and their patterns given in the .td files of a backend specification ? or a subset which match a certain opcode ? otherwise how are the machine instructions being accessed/matched for instruction selection ? -Omer -------------- next part -------------- An HTML attachment was scrubbed... URL:
2016 Nov 17
4
RFC: Insertion of nops for performance stability
Hi all, These days I am working on a feature designed to insert nops for IA code generation that will provide performance improvements and performance stability. This feature will not affect other architectures. It will, however, set up an infrastructure for other architectures to do the same, if ever needed. Here are some examples for cases in which nops can improve performance: 1. DSB
2002 Apr 07
2
HTB question
Hi, I am new to tc, please forgive me for simple question. I have linux 2.4 in my routers, I would like to use HTB. I have downloaded binary code from http://luxik.cdi.cz/~devik/qos/htb/#source, (tc.gz), but I could not open the file. Is there any other place I can get binary code for HTB. Also if you can give some direction how to patch it, it will be really helpful. Thanks in advance Omer
2000 Jun 27
1
Retrieving browser lists
I've searched the Samba docs, man pages, Using Samba, and a few other places. I've been unable to find a way to retrieve the browse list (as in Network Neighborhood or net view on Win32) from Samba. I'm using a RH 6.2 box running Samba 2.0.7 in a multi-subnet workgroup (which is really a domain, but I don't have a machine trust account and I'm using security = server). Samba is
2011 Aug 13
2
[LLVMdev] Order of code generation
On 13/08/11 00:01, Cameron Zwarich wrote: > They do work if you have GraphViz binaries in your path when you configure LLVM. I think you also need to build with assertions enabled. Ciao, Duncan. > > Cameron > > On Aug 12, 2011, at 2:59 PM, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ wrote: > >> I need help with visualizing graphs before and after instruction selection. >> The llc options
2011 Aug 15
2
[LLVMdev] Order of code generation
On 15/08/11 13:12, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ wrote: > How do I enable the assertions when building ? > I am using 2.9, the current version, and when I use the standard build llc does > not give me the view-*-dags options. Configure with --enable-assertions Ciao, Duncan. > > -Omer > > On Sat, Aug 13, 2011 at 1:50 AM, Duncan Sands <baldrick at free.fr > <mailto:baldrick at
2011 Aug 15
0
[LLVMdev] Order of code generation
After enabling assertions and recompilation I still get this error. ~/bin/llvm$ llc -view-isel-dags t3.bc llc: Unknown command line argument '-view-isel-dags'. Try: 'llc -help' llc: Did you mean '-fast-isel-abort'? and I see the view-edge bundles option but get the following error. ~/bin/llvm$ llc -view-edge-bundles t3.bc Writing
2005 Jun 14
1
KMEANS output...
Using R 2.1.0 on Windows 2 questions: 1. Is there a way to parse the output from kmeans within R? 2. If the answer to 1. is convoluted or impossible, how do you save the output from kmeans in a plain text file for further processing outside R? Example: > ktx<-kmeans(x,12, nstart = 200) I would like to parse ktx within R to extract cluster sizes, sum-of-squares values, etc., OR save ktx in
2011 Aug 15
0
[LLVMdev] Order of code generation
How do I enable the assertions when building ? I am using 2.9, the current version, and when I use the standard build llc does not give me the view-*-dags options. -Omer On Sat, Aug 13, 2011 at 1:50 AM, Duncan Sands <baldrick at free.fr> wrote: > On 13/08/11 00:01, Cameron Zwarich wrote: > > They do work if you have GraphViz binaries in your path when you > configure LLVM.
2011 Aug 12
2
[LLVMdev] Order of code generation
I need help with visualizing graphs before and after instruction selection. The llc options listed in the docs do not work as specified. -Omer 2011/8/8 Rafael Ávila de Espíndola <rafael.espindola at gmail.com> > On 08/06/2011 02:40 AM, Sanjoy Das wrote: > > Hi! > > > > I have a DAG (attached), which, according to me, should result in the > > code for
2006 Dec 06
5
LVM & volume groups
Can anybody tell me if it makes a difference if domU''s have separate LVM volume groups? For instance, the Xen User Manual ( http://tx.downloads.xensource.com/downloads/docs/user/#SECTION03330000000000000000) says, when setting up a domU''s disks with LVM, to do a vgcreate vg /dev/sda10 Should each domU have it''s own volume group, or can all the domU''s share
2018 May 09
0
more reassociation in IR
When you say that distribution shouldn't be used, do you mean within instcombine rather than some other pass? Or not all as an IR optimization? A dedicated optimization pass that looks for and makes factoring/distribution folds to eliminate instructions seems like it would solve the problems that I'm seeing. Ie, I'm leaning towards the proposal here: https://reviews.llvm.org/D41574
2012 Feb 24
0
[LLVMdev] CodeGen instructions and patterns
Hi Omer, On Feb 24, 2012, at 8:46 AM, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ <omerbeg at gmail.com> wrote: > Is there a generic function that gives the machine instructions and their patterns given in the .td files of a backend specification ? > or a subset which match a certain opcode ? I'm not aware of any dump utility functions to display that information concisely. I agree such a thing would be