similar to: removing specific rows from array

Hmm, okay. Then what's the problem being reported here? I'm not sure what I'm supposed to do with "LLVM ERROR: Cannot select: t1: i16 = Constant<127>".BTW, the function is: ; ModuleID = 'return.c' source_filename = "return.c" target datalayout = "E-m:e-p:16:16:16-i1:16:16-i8:16:16-i16:16:16-i32:16:16-i64:16:16-S16-n16" target triple =

Well, that's the thing: I thought that was CopyToReg. I don't know what the name of the node is to load one value into a register, so I don't know how to construct such a pattern. On Sat, Nov 4, 2017 at 9:23 PM Craig Topper <craig.topper at gmail.com> wrote: > Do you have a pattern for loading an i16 immediate into a 16-bit register? > > ~Craig > > On Sat, Nov 4,

Hi all, I need to compare time series data files of different time formats. I had no problems with text format using strptime. But how can I convert datetime numbers from Excel (days since 30.12.1899 00:00:00) into POSIXt objects? For example 29770.375 should be converted to "03.07.1981 09:00:00" I tried the following code and encountered strange results: t1-t0 gives 29770.33

The recent discussion of nsw led me to go back and review the current definition of nsw in greater depth, and it turns out that even with all the theoretical effort, it's still logically inconsistent. First, a warning: The scenario below is artificial. This is just a demonstration. Also, ignore the fact that instcombine would zap everything. Depending on that would be an implicit pass

Hi, Yes, ldd is generating wrong tbss size. It is just considering one tbss section and not calculating all sections from all objects. The following example on x86_64 shows the issue: --- t0.c --- #include <stdio.h> extern __thread int t0; extern __thread int t1; extern __thread int t2; extern __thread int t3; __thread int t4; __thread int t5; __thread int t6; __thread int t7; int

Hi the list, I am writing a R function that call a C function. The C function needs integers but I do not manage to give a NA integer as argument : --- C code --- void essai(int *t){ Rprintf("\nT0=%i T1=%i T2=%i T3=%i",t[0],t[1],t[2],t[3]); } --- R --- boub <- c(1,2,3,4) .C("pour",as.integer(boub),NAOK=TRUE) # T0=1 T1=2 T2=3 T3=4[[1]] # [1] 1 2 3 4 boub <-

Hello. I'm having problems at instruction selection with my back end with the following basic-block due to a vector add with immediate constant vector (obtained by vectorizing a simple C program doing vector sum map): vector.ph: ; preds = %vector.memcheck50 %.splatinsert = insertelement <8 x i64> undef, i64 %i.07.unr, i32 0

Dear all, I have looked for an answer for a couple of days, but can't come with any solution. I have a set of functions, say: > t0 <- function(x) {1} > t1 <- function(x) {x} > t2 <- function(x) {x^2} > t3 <- function(x) {x^3} I would like to find a way to add up the previous 4 functions and obtain a new function: > rrr <- function(x) {1+x+x^2+x^3} without,

Hallo! I have two groups (placebo/verum), every subject is measured at 5 times, the first time t0 is the baseline measurement, t1 to t4 are the measurements after applying the medication (placebo or verum). The question is, if there is a significant difference in the two groups and how large the differnce is (95% confidence intervals). Let me give sample data # Data

Hello, i am experimenting with the increase in register/ vector width to 64 elements of 32 bits instead of 16 in x86 backend. for eg. i have a loop with 65 iterations; if my IR generates v64i32 and 1 scalar, still the backend breaks the v64i32 into 4 v16i32. i want it to retain v64i32. like if there are 128 elements in loop then it should break it into 2 v64i32 instructions. in order to do this i

hello, I have a simple question: I want to compute the average of 6 variables, my data looks like this: t0 t1 t2 t3 t4 t5 1 32 34 36 40 38 40 2 35 37 38 36 33 39 . . . I want the mean of t0-t5 for each row (observation). thank you, sigalit. [[alternative HTML version deleted]]

Dan Gohman <gohman at apple.com> writes: > For example, suppose we want to convert the && to &, and the ?: to a > select, in this code: > > if (a && (b ? (c + d) : e)) { > > because we have a CPU architecture with poor branch prediction, or > because we want more ILP, or because of some other reason. Here's what the > LLVM IR for that might

> The underlying liveness datastructure is a list of ranges where each vreg is alive > (ranges in terms of instructions numbered). I remember a couple of later linear scan > papers describing the same thing (Traub et.al. being the first if I remember correctly). > That should be as accurate as you can get in terms of liveness information. It depends on the details. For example, given

also i further run the following command; llc -debug filer-knl_o3.ll and its output is attached here. by looking at the output can we say that legalization runs fine and the error is due to instruction selection/ pattern matching which is not yet implemented? so do i need to worry and try to correct it at this stage or should i move forward to implement instruction selection/ pattern matching?

> We first perform a speculation transformation, hoisting all of the > code above the %overflow_check branch: > > %t0 = add nsw i32 %a, %b > %t1 = sext i32 %t0 to i64 > %t2 = ashr i64 %t1, 31 > %t3 = add i64 %t2, 1 > %t5 = icmp ult %t3, 2 > %t6 = udiv i1 1, %t5 > br i1 %overflow_check, label %no_overflow, label %end > > no_overflow: > >

So there's a DAG that looks like this in the debug output: Selecting: t3: ch,glue = CopyToReg t0, Register:i16 %R5, Constant:i16<127> In the instruction selection phase, what pattern would that match? I've constructed this so far: (??? REG16:$dst, i16imm:$src) but the problem is, I can't determine what to use as ???. There is an ISD::CopyToReg enum value, but I don't

Here is a last example to illustrate my concern. The problem is about the lowering of node t13. Initial selection DAG: BB#0 '_start:entry' SelectionDAG has 44 nodes: t11: i16 = Constant<0> t0: ch = EntryToken t3: ch = llvm.clp.set.rspa t0, TargetConstant:i16<392>, Constant:i32<64> t5: ch = llvm.clp.set.rspb t3,

On Tue, Dec 6, 2011 at 9:06 AM, David A. Greene <greened at obbligato.org>wrote: > Dan Gohman <gohman at apple.com> writes: > > > For example, suppose we want to convert the && to &, and the ?: to a > > select, in this code: > > > > if (a && (b ? (c + d) : e)) { > > > > because we have a CPU architecture with poor branch

Hi All, I have a question about splitting 'EXTRACT_VECTOR_ELT' with 'v2i1'. I have a llvm IR code snippet as following: llvm IR code snippet: for.body: ; preds = %entry, %for.cond %i.022 = phi i32 [ 0, %entry ], [ %inc, %for.cond ] %0 = icmp ne <2 x i32> %vecinit1, <i32 0, i32 -23> %1 = extractelement <2 x i1>

On Dec 5, 2011, at 4:44 PM, Paul Robinson wrote: > (If this thread is becoming tiresome, let me know. This newbie is trying to > understand some of what's going on; clearly you've thought about it way more > than I have, and I can understand if you want to stop thinking about it!) > > On Mon, Dec 5, 2011 at 2:22 PM, Dan Gohman <gohman at apple.com> wrote: > On Dec