similar to: how to fit gauss beam?

All, If we can speculatively execute a load instruction, why isn’t it safe to hoist it out by promoting it to a scalar in LICM pass? There is a comment in LICM pass that if a load/store is conditional then it is not safe because it would break the LLVM concurrency model (See commit 73bfa4a). It has an IR test for checking this in test/Transforms/LICM/scalar-promote-memmodel.ll However, I have

I think gcc is right. It inserted a branch for n == 0 (the cbz at the top), so that's not a problem. In all other regards, this is safe: if you examine the sequence of loads and stores, it eliminated all but the first load and all but the last store. How's that unsafe? If I had to guess, the bug here is that LLVM doesn't want to hoist the load over the condition (which it is right

How to use R to solve the optimisaton problem Minimize: ?*w^T*omega*w+mu^T*w+c^T(w-w0) for w>w0 long position ?*w^T*omega*w+mu^T*w-c^T(w-w0) for w<w0 short position W: is the update weight of portfolio Wo is the initial weight of portfolio Omega is the variance covariance matrix mu is the vector of return rate of stocks in the portfolio C is the vector coefficient of transaction cost

In Version 1.1.0 Under development (unstable) (June 8, 2000) there seems to be a problem with an internal variable w0 in legend that generates the following new error: Error in legend((par()$usr)[1:2], (par()$usr)[3:4], Legend, lty = lty, : Object "w0" not found > -.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.- r-devel mailing list -- Read

Thanks for the background on the concurrent memory model. So, is it sufficient that the loop entry is guarded by condition (cbz at top) for preventing the race? The loop entry will be guarded by condition if loop has been rotated by loop rotate pass. Since LICM runs after loop rotate, we can use ScalarEvolution::isLoopEntryGuardedByCond to check if we can speculatively execute load without

Hello, Rlisters I have to compute p-values that are on the tail of the distribution, P-values < 10^-20. However, my current implementations enable one to estimate P-values up to 10^-12, or so. A typical example is found below, where t is my critical value. ########### example - code adapted from Rassoc ####################### rho01 = 0.5 rho105 = 0.5 rho005 = 0.5 t = 8 z = 2

Hi llvmdev! I've been working on adding coroutines to LLVM. Mentioned below is the implementation plan I'm following, for suggestions, flames and other input. Using segmented stacks is a prerequisite. The idea is to associate every coroutine with a coroutine descriptor. A coroutine descriptor consists of four words: w0, w1, w2 and w3. w0 always contains the _launcher_, and invoking a

Hello, For a very simple loop where all IV users are post-inc users, I observed redundant add instructions in AArch64. From LSR debug, I can see initial formula for icmp is the one that transformed to a post-inc form in OptimizeLoopTermCond() and later expanded in post-inc mode. Based on the observation that the icmp is already a post-inc user, I hacked LSR to prevent the icmp from being

Saving lda.default as text files from within gui="none" and from within gui="gnome" and comparing afterwards with diff, I get: alobo at humboldt:> diff lda.default.gnome.txt lda.default.nognome.txt 1c1 < function (x, grouping, prior = proportions, tol = 1, method = c("moment", --- > function (x, grouping, prior = proportions, tol = 1e-04, method =

Currently the AtomicExpandPass will lower the following IR: define i1 @foo(i32* %obj, i32 %old, i32 %new) { entry: %v0 = cmpxchg weak volatile i32* %obj, i32 %old, i32 %new _*release acquire*_ %v1 = extractvalue { i32, i1 } %v0, 1 ret i1 %v1 } to the equivalent of the following on AArch64: _*ldxr w8, [x0]*_ cmp w8, w1 b.ne .LBB0_3 // BB#1:

Hello, We're evaluating memory tagging (MTE) on some internal workloads. We noticed that stack variables are tagged by an instrumentation pass and heap objects are handled by the allocator (Scudo). How about global variables? We tried a simple case using -march=armv8a+memtag -fsanitize=memtag, but found no tagging: Are we missing anything or tagging globals is still in progress? int

> On May 27, 2016, at 2:50 PM, via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello, > > For a very simple loop where all IV users are post-inc users, I observed redundant add instructions in AArch64. > > From LSR debug, I can see initial formula for icmp is the one that transformed to a post-inc form in OptimizeLoopTermCond() and later expanded in post-inc

I have a collection of datasets in separate data frames which have 3 independent test parameters (w, x, y) and one dependent variable (z) , together with some additional static test data on each row. What I want is a data frame which contains the test data, the parameters (w, x, y) and the mean value of all (z)s in the Z column. Each datasets has around 6000 rows and around 7 columns, which

I am trying to use R to do a weighted GAM with PA (presence/random) as the response variable (Y, which is a 0 or a 1) and ASPECT (values go from 0-3340), DEM (from 1500-3300), HLI (from 0-5566), PLAN (from -3 to 3), PROF (from -3 to 3), SLOPE (from 100-500) and TRI (from 0-51) as predictor variables (Xs). I need to weight each observation by its WO value (from 0.18 to 0.98). I have specified the

Hi All, I've encountered an issue where tail merging MIs is causing a problem with the post-RA MI scheduler dependency analysis and I'm not sure of the best way to address the problem. In my case, the branch folding pass (lib/CodeGen/BranchFolding.cpp) is merging common code from BB#14 and BB#15 into BB#16. It's clear that there are 4 common instructions (marked with an *) in BB#14

I suspect that this is hitting the issue that I mentioned here: https://reviews.llvm.org/D65857#1621335 We may need to do what I suggested there and restrict global tag entropy on non-Android Linux to 7 bits. You can try working around this issue for now by using lld as the linker (-fuse-ld=lld). Peter On Mon, Jun 22, 2020 at 1:37 PM Mitch Phillips via llvm-dev < llvm-dev at

On Wed, Nov 11, 2020 at 10:37 PM Fāng-ruì Sòng <maskray at google.com> wrote: > If you want to drop symbol versioning with llvm-objcopy: > > * llvm-objcopy -R .gnu.version -R .gnu.version_r in.so out.so > * However, llvm-objcopy zeroes out the section content so at runtime glibc ld.so will error > "unsupported version 0 of Verneed record". > Thus we need to

Thanks for the confirmation. From the assembly that was sent on the other branch of the thread: > .set .L.str, .L.str.hwasan-3458764513820540928 -3458764513820540928 = 0xd0 << 56 i.e. a "negative" tag. So this appears to be the issue exactly. Peter On Mon, Jun 22, 2020 at 1:55 PM Derrick McKee <derrick.mckee at gmail.com> wrote: > Using lld fixes this issue. >

Hi, I am trying to execute a simple hello world program compiled like so: path/to/compiled/clang -o test --target=aarch64-linux-gnu -march=armv8.5-a -fsanitize=hwaddress --sysroot=/usr/aarch64-linux-gnu/ -L/usr/lib/gcc/aarch64-linux-gnu/10.1.0/ -g test.c However, when I look at the disassembly, there is an unknown instruction listed at 0x2d51c: 000000000002d4c0 main: 2d4c0: ff c3 00 d1

Thanks for the update, Phillips. Yes, please add me, Stephen and Ana (CCed) to Phabricator reviews. Zhaoshi From: Mitch Phillips <mitchp at google.com> Sent: Tuesday, July 14, 2020 19:10 To: Zhaoshi Zheng <zhaoshiz at quicinc.com> Cc: llvm-dev at lists.llvm.org; Stephen Long <steplong at quicinc.com> Subject: [EXT] Re: [llvm-dev] [MTE] Tagging Globals Hi Zhaoshi, Currently