similar to: rollols

Hi, I have a problem with predict.nnet when I try to use it. It crashes R with a memory access violation. platform Windows arch x86 os Win32 system x86, Win32 status major 1 minor 1.1 year 2000 month August day 15 language R I admit the data set is quite large ~ [3000, 101] and its a 3 class problem. I know that it works fine when there is a single target. I wonder

My main reason not to upgrade to Ast 13 is because I'm afraid of losing functionality as there are certain functions deprecated/replaced. This can also cause headache :-) I will do so if there is no other option. But still, I don't see why Ast 13 would differ so much in this case ? If ICE and NAT is working (not causing problems) why should Ast 13 bring me audio and Ast 12 don't

Hello setting "nat=no" or omitting "nat=" in peer definition does not help either. Still no audio. Why do you think this is a NAT issue ? IP and port information in SDP-body is correct. Kind regards. On 12-08-16 09:25, ????? ?????? wrote: > > Try delete nat from 770000wrtc settings ice should do the same > > > On Aug 11, 2016 10:00 PM, "Jonas

On 11-08-16 18:03, Matt Fredrickson wrote: > On Thu, Aug 11, 2016 at 9:40 AM, Jonas Kellens <jonas.kellens at telenet.be> wrote: >> My main reason not to upgrade to Ast 13 is because I'm afraid of losing >> functionality as there are certain functions deprecated/replaced. This can >> also cause headache :-) >> >> I will do so if there is no other option.

Hi, fp is a data frame like this ,----[ fp ] | Frequenz AmpNorm | 1 3322 0.0379490639 | 2 3061 0.0476033058 | 3 2833 0.0592954124 | 4 2242 0.1275510204 `---- i want to find the "Frequenz" where "AmpNorm" is max. I use this line as workaround: PeakFreqHz = subset(fp, AmpNorm == max(AmpNorm))$Frequenz[1] Is there something nicer? And is there an

On Sun, Dec 18, 2016 at 11:58 PM, Jonas Maebe <jonas-devlists at watlock.be> wrote: > > Actually, there's another —even more fundamental— problem: the longjmp > will always restore the non-volatile registers to the contents they had > at the start of the try-block, which is not what LLVM expects when > entering an SEH-based landing pad. > The SjLjEHPrepare pass tries

Hello I can confirm that the variable DIALEDPEERNAME contains the information that I would expect in the variable BRIDGEPEER. But I read nowhere that DIALEDPEERNAME has replaced BRIDGEPEER as of Asterisk version 13 ?! So if this is not the intention, then yes this is probably a bug and should be reported. Kind regards. Jonas. On 18-09-16 19:58, Ludovic Gasc wrote: > Hi, > >

Code doesn't just write itself... Jonas Keidel <jonas at jonas-keidel.de> wrote: >I like to reactivate this topic because i don't see any changes at the >last >time... >So what about the topic? > > >2013/8/9 Jonas Keidel <jonas at jonas-keidel.de> > >> 2013/8/7 Jonas Keidel <jonas at jonas-keidel.de> >> >>> >>>

On Thu, 14 Jun 2018 at 17:58, Greg Clayton <clayborg at gmail.com> wrote: > > > > On Jun 14, 2018, at 9:36 AM, Adrian Prantl <aprantl at apple.com> wrote: > > > > On Jun 14, 2018, at 7:01 AM, Pavel Labath via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Thank you all. I am going to try to reply to all comments in a single email. > >

Hi Jonas, I won’t have time to look at it this week after all. I’ll try to do that next week. If you do not hear back from me by end of next, do not hesitate to ping me! Cheers, -Quentin > On Apr 22, 2015, at 9:32 AM, Quentin Colombet <qcolombet at apple.com> wrote: > >> >> On Apr 21, 2015, at 11:49 PM, Jonas Paulsson <jonas.paulsson at ericsson.com

I want to fit discrete data that was measured on a wavegenerator. In this minimal example i generate some artificial data: testsin <- 2+ 5 * sin(1:100) #generate sin data testsin <- testsin+ rnorm(length(testsin), sd = 0.01) #add noise mydata <- list(X=1:100, Y=testsin) # generate mydata object nlmod <- nls(X ~ A+B*sin(C* Y), data=mydata, start=list(A=2, B=4, C=1), trace=TRUE) #

Hi Jonas, > On Apr 20, 2015, at 4:03 AM, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: > > Hi Quentin, > > After Simple Register Coalescing. Is the code you have pasted with the PHIs feed to the register coalescer? I am trying to understand the setting to help debugging the problem. Also, what does -debug-only=regalloc tell you? Thanks, -Quentin > >

What about "chain.c32 hd1" or "chain.c32 hd1 swap"? Jonas Keidel <jonas at jonas-keidel.de> wrote: >2013/8/5 Jonas Keidel <jonas at jonas-keidel.de> > >> >> >> 2013/8/5 H. Peter Anvin <hpa at zytor.com> >> >>> On 08/05/2013 07:04 AM, Jonas Keidel wrote: >>> >>> > >>> > So i've also

Thanks for the information. This has been very useful! Patch points indeed *almost* do what I need. I will try to build a similar solution. Self-modifying code for truly zero-overhead (when not enabled) > instrumentation is a real thing (look at e.g. DTrace pid provider) but > unless the number of instrumentation point is very large (100's of > thousands? millions?) or not known

2013/8/7 Jonas Keidel <jonas at jonas-keidel.de> > > > 2013/8/6 H. Peter Anvin <hpa at zytor.com> > >> On 08/05/2013 11:29 PM, Jonas Keidel wrote: >> > 2013/8/6 H. Peter Anvin <hpa at zytor.com> >> > >> >> What about "chain.c32 hd1" or "chain.c32 hd1 swap"? >> >> >> > >> >

I looked at SplitKit, but I am not sure how to best do it, so it would be great if you could take a look. /Jonas On 2015-04-21 19:35, Quentin Colombet wrote: >> On Apr 21, 2015, at 7:40 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: >> >> >>> On Apr 21, 2015, at 05:39, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: >>> >>>

Hi Anshu, Would there be any interest in extending this algorithm to handling more extensive models, such as VLIW scheduling based on FU's and bundle space... ie handle multiple stages ? I might do it and commit, if there is acceptance and guidance... Jonas ________________________________ From: Anshuman Dasgupta [mailto:adasgupt at codeaurora.org] Sent: Tuesday, February 12, 2013 4:47 PM

Hi Andy, The thing is that I was trying to build a sched graph in other places than these two standard scheduling passes. For instance, in pre-emit. I would like to reschedule a basic block on my vliw target just before assembly emission. I tried to add SUnits for hazards in an experiment, but this gave very weird errors... even while allocating extra space in SUnits vector. For some function, I

On Thu, 14 Jun 2018 at 19:26, David Blaikie <dblaikie at gmail.com> wrote: > > > > On Thu, Jun 14, 2018 at 11:24 AM Pavel Labath <labath at google.com> wrote: >> >> On Thu, 14 Jun 2018 at 17:58, Greg Clayton <clayborg at gmail.com> wrote: >> > >> > >> > >> > On Jun 14, 2018, at 9:36 AM, Adrian Prantl <aprantl at

Hi Jonas, When is the MachineVerifier complaining? I mean after which pass? Thanks, -Quentin > On Apr 17, 2015, at 7:17 AM, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: > > Hi, > > thanks for answering, but the COPY is there already from after isel. It is a copy of a subreg, after a a call returning 64 bits. > > call