similar to: determine the latency characteristics of a VM automatically

From: Nate Studer <nate.studer@dornerworks.com> Add a utility function to update the rest of the timeslice accounting fields when updating the timeslice of the credit scheduler, so that capped CPUs behave correctly. Before this patch changing the timeslice to a value higher than the default would result in a domain not utilizing its full capacity and changing the timeslice to a value lower

Add a xen command-line parameter, sched_credit_tslice_ms, to set the timeslice of the credit1 scheduler. Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com> diff -r 4a4882df5649 -r 782284c5b1bc xen/common/sched_credit.c --- a/xen/common/sched_credit.c Wed Aug 31 15:23:49 2011 +0100 +++ b/xen/common/sched_credit.c Thu Sep 01 16:29:50 2011 +0100 @@ -41,15 +41,9 @@ */ #define

Hi, some days ago we discused here the need for an analyzer for the 1000 Hz tone, as opposite application to Milliwatt. Here it is: Mwanalyze http://planinternet.net/download/voip/asterisk/app_mwanalyze.c It performs a Fourier analysis for a fixed frequency and tells the amplitude. The frequency is not limited to 1000 Hz, but can be passed as argument. The periode duration must be a mulitple

Hello, There it is, all my computers on FreeBSD 9.1-RELEASE had panic. I can just say there is a problem in the 9.1-RELEASE because I had no panic before. What afraid me is that my production server also panic'ed a few days ago, fortunately it does not appears so often. This is a panic that happened on my desktop computer, with a graphic card. The crash usually appears when X starts. GNU

$ glmark2 ======================================================= glmark2 2014.03 ======================================================= OpenGL Information GL_VENDOR: nouveau GL_RENDERER: Gallium 0.4 on NV98 GL_VERSION: 3.0 Mesa 11.2.0 ======================================================= /etc/X11/xorg.conf.d/nouveau.conf Section "Device" Identifier

Hello after upgrading to 9.2-release i can see periodical page faults. advises welcome. examples: 1. Fatal trap 12: page fault while in kernel mode cpuid = 5; apic id = 22 fault virtual address = 0x18 fault code = supervisor read data, page not present instruction pointer = 0x20:0xffffffff8051095c stack pointer = 0x28:0xffffff88a9d77800 frame pointer =

Hello, I want to share/split bandwidth on a link with unknown bandwidth. I want to exactly share/split bandwidth (for example : FTP 30% , HTTP 20% or 30% for a group of PCs and so forth.) "Traffic-Control-HOWTO" talk that PRIO scheduler is an ideal match for "Handling a link with a variable (or unknown) bandwidth". But PRIO scheduler can not exactly share/split

Hi, after updating my freebsd amd64 box from 9.1 (r250841) to 9.2-RC (r254276) virtualbox crashes the machine. Seconds after starting VBOX the screen freezes and then reboots (probably a trap, cannot see it, as screen is in graphics mode). The kernel modules of vbox have been recompiled. Going back to 9.1 kernel and matching vbox modules works. In both cases VBOX 4.2.16 is used. cheers, Thomas

I hope this is merely a FAQ, and not an AFAQ (annoyingly....). I'm a SAS programmer, with several years' experience of the system, evaluating alternatives. See the SAS for Linux website (URL in sig) for more info. I'm exploring R's capabilities and limitations. I'd be very interested in having a deeper understanding of it capacity and performance limitations in dealing with

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

Hello: Is there a way to get the resident memory size of the rails process in- code using ruby? I''d like to have my application log the size of its own memory. Thank you in advance, Dan --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "Ruby on Rails: Talk" group. To post to this group, send email

This issue came up when debugging pcpu linked list corruption (patches for that issue to follow). -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900, http://www.citrix.com _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel

Box with fresh RELENG_7 panic under heavy network load (more than 50k connections). This panics seems to be senfile(2) related, because when sendfile disabled in nginx, I can't reproduce the problem. Backtrace in all cases like this: # kgdb kernel /spool/crash/vmcore.1 GNU gdb 6.1.1 [FreeBSD] Copyright 2004 Free Software Foundation, Inc. GDB is free software, covered by the GNU General

2014-05-07 11:01-0400, Waiman Long: > From: Peter Zijlstra <peterz at infradead.org> > > Because the qspinlock needs to touch a second cacheline; add a pending > bit and allow a single in-word spinner before we punt to the second > cacheline. I think there is an unwanted scenario on virtual machines: 1) VCPU sets the pending bit and start spinning. 2) Pending VCPU gets

2014-05-07 11:01-0400, Waiman Long: > From: Peter Zijlstra <peterz at infradead.org> > > Because the qspinlock needs to touch a second cacheline; add a pending > bit and allow a single in-word spinner before we punt to the second > cacheline. I think there is an unwanted scenario on virtual machines: 1) VCPU sets the pending bit and start spinning. 2) Pending VCPU gets

On Tue, Oct 25, 2016 at 11:03:11AM +0200, Christian Borntraeger wrote: > For spinning loops people do often use barrier() or cpu_relax(). > For most architectures cpu_relax and barrier are the same, but on > some architectures cpu_relax can add some latency. > For example on power,sparc64 and arc, cpu_relax can shift the CPU > towards other hardware threads in an SMT environment.

On Tue, Oct 25, 2016 at 11:03:11AM +0200, Christian Borntraeger wrote: > For spinning loops people do often use barrier() or cpu_relax(). > For most architectures cpu_relax and barrier are the same, but on > some architectures cpu_relax can add some latency. > For example on power,sparc64 and arc, cpu_relax can shift the CPU > towards other hardware threads in an SMT environment.

On Fri, Feb 07, 2020 at 08:47:14AM +0100, Christian Borntraeger wrote: > Also adding Cornelia. > > > On 06.02.20 23:17, Michael S. Tsirkin wrote: > > On Thu, Feb 06, 2020 at 04:12:21PM +0100, Christian Borntraeger wrote: > >> > >> > >> On 06.02.20 15:22, eperezma at redhat.com wrote: > >>> Hi Christian. > >>> > >>>

On Fri, Feb 07, 2020 at 08:47:14AM +0100, Christian Borntraeger wrote: > Also adding Cornelia. > > > On 06.02.20 23:17, Michael S. Tsirkin wrote: > > On Thu, Feb 06, 2020 at 04:12:21PM +0100, Christian Borntraeger wrote: > >> > >> > >> On 06.02.20 15:22, eperezma at redhat.com wrote: > >>> Hi Christian. > >>> > >>>