similar to: Bug#625438: [PATCH] xen: ioapic: avoid gcc 4.6 warnings about uninitialised variables

Displaying 19 results from an estimated 19 matches similar to: "Bug#625438: [PATCH] xen: ioapic: avoid gcc 4.6 warnings about uninitialised variables"

2007 Apr 18
2
refactoring io_apic.c
OK, I need to do something like this to io_apic.c - split the hardware specific parts out under mach-default, so we can override them for other subarchitectures. It's not finished, needs header file and makefile work. Would you be willing to take this if I do it? I'm not going to bother if you're not, such refactorings are a pig to maintain out of tree. Frankly, io_apic.c needs a
2007 Apr 18
2
refactoring io_apic.c
OK, I need to do something like this to io_apic.c - split the hardware specific parts out under mach-default, so we can override them for other subarchitectures. It's not finished, needs header file and makefile work. Would you be willing to take this if I do it? I'm not going to bother if you're not, such refactorings are a pig to maintain out of tree. Frankly, io_apic.c needs a
2007 May 15
3
[PATCH 1/12] Add suspend/resume to devices owned by Xen
Add suspend/resume to devices owned by Xen. Signed-off-by Ke Yu <ke.yu@intel.com> Signed-off-by Kevin Tian <kevin.tian@intel.com> diff -r 3ef0510e44d0 xen/arch/x86/apic.c --- a/xen/arch/x86/apic.c Tue May 08 10:21:23 2007 +0100 +++ b/xen/arch/x86/apic.c Mon May 14 15:05:28 2007 -0400 @@ -579,6 +579,95 @@ void __devinit setup_local_APIC(void) apic_pm_activate(); } +static
2012 Oct 18
3
[PATCH 1/1] keep iommu disabled until iommu_setup is called
The iommu is enabled by default when xen is booting and later disabled in iommu_setup() when no iommu is present. But under some circumstances iommu-code can be called before iommu_setup() is processed. If there is no iommu available xen crashes. This can happen for example when panic(...) is called that got introduced with patch "x86-64: detect processors subject to AMD erratum #121 and
2008 Sep 28
7
[PATCH] Share the IO_APIC_route_entry with iosapic
The patch moves the struct IO_APIC_route_entry to a common place. This allows us to share the struct with iosapic. Thanks, -- Dexuan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2010 Jul 28
22
ACPI-Tables corrupted?
Hi, on a Nehalem system with VT-d enabled we are seeing strange ACPI-Table contents, especially a corrupted DMAR entry. The hypervisor shows following data on boot: (XEN) ACPI: RSDP 000F80E0, 0024 (r2 PTLTD ) (XEN) ACPI: XSDT BF7C469E, 00D4 (r1 PTLTD XSDT 60000 LTP 0) (XEN) ACPI: FACP BF7C9CC9, 00F4 (r3 FSC TYLERBRG 60000 PTL F4240) (XEN) ACPI: DSDT BF7C4772, 54D3 (r1
2012 Feb 03
3
IO-APIC: tweak debug key info formatting
The formatting of the IO-APIC debug key info has niggled me for a while, and with the latest interrupt bug I am chasing, has finally motivated me to fix it. The attached patch causes all columns to line up, and removes the comma which served no purpose in combination with the spaces already present. -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900,
2012 Oct 18
0
[PATCH 0/1] fix xen-crash at panic()-call during boot
Xen is crashing for me since version 4.1.3 during boot on a AMD machine. This happens since patch "x86-64: detect processors subject to AMD erratum #121 and refuse to boot." Instead of the actual panic-message from the patch the following stacktrace appears (i typed it down from screen, so it might contain typos) find_iommu_for_device amd_iommu_ioapic_update_ire timer_interrupt
2008 Nov 13
69
[PATCH 00 of 38] xen: add more Xen dom0 support
Hi Ingo, Here''s the chunk of patches to add Xen Dom0 support (it''s probably worth creating a new xen/dom0 topic branch for it). A dom0 Xen domain is basically the same as a normal domU domain, but it has extra privileges to directly access hardware. There are two issues to deal with: - translating to and from the domain''s pseudo-physical addresses and real machine
2013 Mar 19
7
[PATCH 0/3] IOMMU errata treatment adjustments
1: IOMMU: properly check whether interrupt remapping is enabled 2: AMD IOMMU: only disable when certain IVRS consistency checks fail 3: VT-d: deal with 5500/5520/X58 errata Patch 1 and 2 are version 2 of a previously submitted, then withdrawn patch following up after XSA-36. Patch 3 is version 3 of a patch previously sent by Malcolm and Andrew. Signed-off-by: Jan Beulich
2014 Aug 20
1
[RFC PATCH 11/11] x86/MSI: Refactor x86 MSI code
> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at
2014 Aug 20
1
[RFC PATCH 11/11] x86/MSI: Refactor x86 MSI code
> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at
2013 May 02
5
[PATCH] x86: allow Dom0 read-only access to IO-APICs
There are BIOSes that want to map the IO-APIC MMIO region from some ACPI method(s), and there is at least one BIOS flavor that wants to use this mapping to clear an RTE''s mask bit. While we can''t allow the latter, we can permit reads and simply drop write attempts, leveraging the already existing infrastructure introduced for dealing with AMD IOMMUs'' representation as
2014 Jul 26
0
[RFC PATCH 11/11] x86/MSI: Refactor x86 MSI code
Signed-off-by: Yijing Wang <wangyijing at huawei.com> --- arch/x86/include/asm/io_apic.h | 2 +- arch/x86/include/asm/irq_remapping.h | 4 +- arch/x86/include/asm/pci.h | 6 ++-- arch/x86/include/asm/x86_init.h | 10 +++--- arch/x86/kernel/apic/io_apic.c | 23 +++++++-------- arch/x86/kernel/x86_init.c | 12 ++++----
2008 Sep 26
2
RE: [Xen-changelog] [xen-unstable] x86: Properly synchronise updates to pirq-to-vector mapping.
@@ -491,16 +512,15 @@ int pirq_guest_bind(struct vcpu *v, int int rc = 0; cpumask_t cpumask = CPU_MASK_NONE; + WARN_ON(!spin_is_locked(&v->domain->evtchn_lock)); I find this WARN_ON() is triggered harmlessly when I assign device to HVM guest. The call trace is XEN_DOMCTL_bind_pt_irq -> pt_irq_create_bind_vtd() -> pirq_guest_bind(). Should we
2012 Feb 08
18
[PATCH 0 of 4] Prune outdated/impossible preprocessor symbols, and update VIOAPIC emulation
Patch 1 removes CONFIG_SMP Patch 2 removes separate smp_{,r,w}mb()s as a result of patch 1 Patch 4 removes __ia64__ defines from the x86 arch tree Patch 3 is related to patch 4 and changes the VIOAPIC to emulate version 0x20 as a performance gain. It preceeds Patch 4 so as to be more clear about the functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
2011 Jan 21
11
[PATCH]x86:x2apic: Disable x2apic on x86-32 permanently
x86:x2apic: Disable x2apic on x86-32 permanently x2apic initialization on x86_32 uses vcpu pointer before it is initialized. As x2apic is unlikely to be used on x86_32, this patch disables x2apic permanently on x86_32. It also asserts the sanity of vcpu pointer before dereference to prevent further misuse. Signed-off-by: Fengzhe Zhang <fengzhe.zhang@intel.com> diff -r 02c0af2bf280
2014 Jul 26
20
[RFC PATCH 00/11] Refactor MSI to support Non-PCI device
Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use
2014 Jul 26
20
[RFC PATCH 00/11] Refactor MSI to support Non-PCI device
Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use