Displaying 20 results from an estimated 100 matches similar to: "[PATCH] X86: Fix mce offline page bug"
2006 Sep 29
0
[PATCH 2/6] xen: add per-node bucks to page allocator
This patch adds a per-node bucket to the heap structure in Xen. During
heap initialization the patch determines which bucket to place the
memory. We reserve guard pages between node boundaries in the case that
said boundary isn''t already guarded by the MAX_ORDER boundary to prevent
the buddy allocator from merging pages between nodes.
--
Ryan Harper
Software Engineer; Linux Technology
2012 Jul 09
1
Bug#602378: Please can you try 4.1 from Wheezy
There's a couple of patches in 4.1 which might plausibly be the fix for
this.
changeset: 23246:8f927378135a
user: Jan Beulich <jbeulich at suse.com>
date: Wed Mar 07 08:35:58 2012 +0000
files: xen/arch/ia64/xen/domain.c xen/arch/x86/domain.c xen/arch/x86/domctl.c
description:
passthrough: release assigned PCI devices
2010 Nov 04
4
Bug#602378: xen-hypervisor-4.0-amd64: Live migration of Guests crashes and reboots
Package: xen-hypervisor-4.0-amd64
Version: 4.0.1-1
Severity: grave
Tags: squeeze sid
Justification: causes non-serious data loss
Live migration of a guest (running CentOS 5.5, Paravirtualized) crashes the target-host
(Hardware: Dell R610, 2x Xeon 5620, 16Gb RAM, Perc/700-Raid)
(XEN) ----[ Xen-4.0.1 x86_64 debug=n Not tainted ]----
(XEN) CPU: 9
(XEN) RIP: e008:[<ffff82c4801151f6>]
2010 Jun 13
3
panic after zfs mount
Dear all
We ran into a nasty problem the other day. One of our mirrored zpool
hosts several ZFS filesystems. After a reboot (all FS mounted at that
time an in use) the machine paniced (console output further down). After
detaching one of the mirrors the pool fortunately imported automatically
in a faulted state without mounting the filesystems. Offling the
unplugged device and clearing the fault
2010 Mar 23
0
[PATCH] x86: s3: ensure CR4.MCE is enabled after mcheck_init()
Changeset 21045: 7751288b1386 introduces a potential issue: CR4.MCE is enabled
before mcheck_init() -- thought looks I don''t meet with an actual issue with
this, we''d better fix it.
Thanks,
-- Dexuan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
http://lists.xensource.com/xen-devel
2009 Jun 03
0
TINY MCE Jrails media upload
Hi
Can anybody give me idea to do media upload in rails using tiny_mce and
jrails ?
Thanks !
--
Ruby on Rails Developer
http://sandip.sosblog.com
http://funonrails.wordpress.com
www.joshsoftware.com
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2012 Oct 26
0
[PATCH] MCE: Allow AMD MSRs injected via xen-mceinj
Allow AMD MSRs injected via xen-mceinj
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
--
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
2013 Mar 14
1
[PATCH v2 0/2] AMD MCE fixes
Boris,
Here is the updated patch for determining number of regiter banks on
AMD plus a patch removing shared_bank array, as you suggested.
Offline/online testing didn''t show any issues.
Boris Ostrovsky (2):
x86/mce: Replace shared_bank array with is_shared_bank() helper
x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
arch/x86/kernel/cpu/mcheck/mce_amd.c | 38
2016 Jan 22
0
Bug#812166: [PATCH] x86/mce: fix misleading indentation in init_nonfatal_mce_checker().
On 22/01/16 14:38, Ian Campbell wrote:
> Debian bug 812166[0] reported this build failure due to
> Wmisleading-indentation with gcc-6:
>
> non-fatal.c: In function 'init_nonfatal_mce_checker':
> non-fatal.c:103:2: error: statement is indented as if it were guarded by... [-Werror=misleading-indentation]
> switch (c->x86_vendor) {
> ^~~~~~
>
>
2012 Nov 13
1
mce error
During booting of Centos6 I see an error message that goes something like:
Starting mcelog daemon [FAILED]
AMD Processor family 15: Please load edac_mce_amd module.
CPU is unsupported
The only helpful information I have found is in the "preview" of
https://access.redhat.com/knowledge/solutions/158503. I don't have a
RedHat account, so
2012 Sep 07
2
[PATCH] x86/hvm: don't give vector callback higher priority than NMI/MCE
Those two should always be delivered first imo.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/irq.c
+++ b/xen/arch/x86/hvm/irq.c
@@ -395,16 +395,16 @@ struct hvm_intack hvm_vcpu_has_pending_i
struct hvm_domain *plat = &v->domain->arch.hvm_domain;
int vector;
- if ( (plat->irq.callback_via_type == HVMIRQ_callback_vector)
-
2011 Jul 22
0
[PATCH] Dump mce log by ERST when mc panic
Dump mce log by ERST when mc panic
We have implemented basic ERST logic before. Now linux3.0 as dom0 has included APEI logic. Hence it''s time to add mce apei interface and enable APEI ERST feature.
With it, it can save mce log by ERST method when mc panic.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
diff -r ca2f58c2dfea xen/arch/x86/cpu/mcheck/mce.c
---
2013 Mar 14
0
[PATCH v2 2/2] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
Currently number of error reporting register banks is hardcoded to
6 on AMD processors. This may break in virtualized scenarios when
a hypervisor prefers to report fewer banks than what the physical
HW provides.
Since number of supported banks is reported in MSR_IA32_MCG_CAP[7:0]
that''s what we should use.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---
2010 Dec 12
2
CMCI exceptions happened and MCE entry state transition made Xen crashed.
Hi all,
Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error.
I am not sure why so many CMCI happened , maybe there were some thing wrong with the hardware.
2010 Dec 12
2
CMCI exceptions happened and MCE entry state transition made Xen crashed.
Hi all,
Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error.
I am not sure why so many CMCI happened , maybe there were some thing wrong with the hardware.
2011 Mar 21
1
Cant find out MCE reason (CPU 35 BANK 8)
Hello community.
We are running, Centos 4.8 on SuperMicro SYS-6026T-3RF with 2xIntel Xeon
E5630 and 8xKingston KVR1333D3D4R9S/4G
For some time we have lots of MCE in mcelog and we cant find out the reason.
"Ordinary" mce message looks like:
CPU 51 BANK 8 TSC 8511e3ca77dc
MISC 274d587f00006141 ADDR 807044840
STATUS cc0055000001009f MCGSTATUS 0
decode with mcelog --ascii --cpu p4(cause
2016 Jan 22
2
Bug#812166: [PATCH] x86/mce: fix misleading indentation in init_nonfatal_mce_checker().
Debian bug 812166[0] reported this build failure due to
Wmisleading-indentation with gcc-6:
non-fatal.c: In function 'init_nonfatal_mce_checker':
non-fatal.c:103:2: error: statement is indented as if it were guarded by... [-Werror=misleading-indentation]
switch (c->x86_vendor) {
^~~~~~
non-fatal.c:97:5: note: ...this 'if' clause, but it is not
if (
2012 Dec 05
1
Recursive locking in Xen (in reference to NMI/MCE path audit)
Hello,
While auditing the NMI/MCE paths, I have encountered some issues with
recursive locking in Xen, discovered by the misuse of the console_lock
intermittently as a regular lock and as a recursive lock.
The comment in spinlock.h is unclear as to whether mixing recursive and
non recursive calls on the same spinlock is valid. If the calls are
genuinely not valid, then surely regular spinlocks
2012 Dec 04
2
Audit of NMI and MCE paths
I have just starting auditing the NMI path and found that the oprofile
code calls into a fair amount of common code.
So far, down the first leg of the call graph, I have found several
ASSERT()s, a BUG() and many {rd,wr}msr()s. Given that these are common
code, and sensible in their places, removing them for the sake of being
on the NMI path seems silly.
As an alternative, I suggest that we make
2013 Mar 14
1
[PATCH] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
Currently number of error reporting register banks is hardcoded to
6 on AMD processors. This may break in virtualized scenarios when
a hypervisor prefers to report fewer banks that the physical HW
provides.
Since number of supported banks is reported in MSR_IA32_MCG_CAP[7:0]
that''s what we should use.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---