similar to: [RFC PATCH 2/2] ASID: Flush by ASID

Future AMD SVM supports a new feature called flush by ASID. The idea is to allow CPU to flush TLBs associated with the ASID assigned to guest VM. So hypervisor doesn''t have to reassign a new ASID in order to flush guest''s VCPU. Please review it. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro

Keir, pci-detach triggers IO page table deallocation if the last passthru device has been removed from pdev list, and this will result a BUG on amd systems for next pci-attach. This patch fixes this issue. Thanks, Wei Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632

Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi, Attached patch implements the VMCB cleanbits SVM feature. Upcoming AMD CPUs introduce them and they are basically hints for the CPU which vmcb values can be re-used from the previous VMRUN instruction. Each bit represents a certain set of fields in the VMCB. Setting a bit tells the cpu it can re-use the cached value from the previous VMRUN. Clearing a bit tells the cpu to reload the values

Introduce a new flag to disable iommu emulation on old iommu systems. This patch is taken from my v4 patch queue, which is till pending, to make old or non-iommu system to run cleanly without interfered by iommuv2 codes. This might be helpful to isolate iommuv2 code in debugging unstable regressions. The reset part of v4 will be re-based. Thanks, Wei Signed-off-by: Wei Wang

The attached patch fixes the save/restore issue seen with 32bit Windows guest VMs. The root cause is that current Xen doesn''t intercept SYSENTER-related MSRs for 32bit guest VMs. As a result, the guest_sysenter_xxx fields contain incorrect values and shouldn''t be used for save/restore. This patch checks the LMA bit of EFER register in the save/restore code path. Please apply it

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list

flight 5665 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5665/ Regressions :-( Tests which did not succeed and are blocking: build-amd64-oldkern 4 xen-build fail REGR. vs. 5640 build-amd64 4 xen-build fail REGR. vs. 5640 build-i386-oldkern 4 xen-build fail REGR. vs. 5640

Changeset 20514 implemented deallocation for msi interrupt remapping entries. Attached patch adds the same support for amd iommu to fix a xen crash on amd iommu systems. Thanks, Wei Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Legal Information: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34 85609 Dornach b. München Geschäftsführer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni

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Hi Ian, There have been a lot of interest on gfx passthru recently. This patch enables ATI VBIOS in passthru mode. The guest VM system BIOS (including Windows boot logo) can now show in passthru screen. We have tested with various Windows and Linux guest VMs. Please help review it. We are also looking forward to comments and suggestions from Xen community users. Signed-off-by: Wei Huang

Hi David, >>Ah, so this is a commercially backed project? Initially it wasn’t. I started to do this in my own free time and after I got something which I could demonstrate I can be much better than what we currently have with GCC it became part of my day to day job. >>But relatively small? (are you the only engineer working on this?) Yes I’m the only one working on this.

What is the correct form to write statement meaning: if (a==1) {b=2; c=3}; else {b=0; c=0}; Thank you Jue Wang, Biostatistician Contracted Position for Preclinical & Research Biostatistics PrO Unlimited (908) 231-3022

flight 5673 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5673/ Regressions :-( Tests which did not succeed and are blocking: test-i386-i386-xl 14 guest-localmigrate/x10 fail REGR. vs. 5640 Tests which did not succeed, but are not blocking, including regressions (tests previously passed) regarded as allowable: test-amd64-amd64-win 16

This patch set adds basic supports for amd next generation iommu (IOMMUv2) hardware. IOMMUv2 supports various new features advertised by iommu extended feature register. It introduces guest level IO translation and supports state-of-the-art ATS/ATC devices with demand paging capability. Please refer to AMD IOMMU Architectural Specification [1] for more details. Thanks, Wei [1]

Hi all! I''m very interested with XenVGAPassthrough and tries to do it on my system with vt-d support: CPU: Intel core2duo E8400 MB: Asus p5q-vm do mem: 8GB So I''m succeed at Intel IGD: 00:02.0 VGA compatible controller: Intel Corporation 4 Series Chipset Integrated Graphics Controller (rev 03) with Debian Sid''s XEN 4.1/Linux 2.6.39-rc7+ (from git://

Using "par" seems easily put a "hist" and a density side by side on the same output window. I would like to use some features in "histogram" from Lattice, but how can I put "histogram" and "densityplot" side by side on the same graph? Thank you par(mfrow=c(2,1)) hist(y) plot(density(y)) Jue Wang, Biostatistician Contracted Position for

I have a plot of cumulative distribution function which is a step function, I'd like to put a cycle at the right end of each line to indicate that the value here is not available in this line. How can I do that? Thank you. cdf<-function(x){ do.call("rbind",lapply(1:nrow(as.matrix(x)), function(i){ a<-x[i] if (a<0.5){b=0.1} else if (a<1){b=0.3} else if

-- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Geschäftsanschrift): Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland Registergericht Dresden: HRA 4896 vertretungsberechtigter Komplementär: AMD Saxony LLC (Sitz Wilmington, Delaware, USA)