similar to: [PATCH 3/3] x2APIC: improve enabling logic

Displaying 20 results from an estimated 10000 matches similar to: "[PATCH 3/3] x2APIC: improve enabling logic"

2008 Sep 26
1
[PATCH] [VTD] Add a check for interrupt remapping of ioapic RTE
For IOAPIC interrupt remapping, it only needs to remap ioapci RTE, should not remap other IOAPIC registers, which are IOAPIC ID, VERSION and Arbitration ID. This patch adds the check for this and only remap ioapci RTE. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing
2008 Jun 27
0
[PATCH][VTD] Minor fixing of interrupt remapping
When ir_ctrl->iremap_index == -1, it means there is no remap entry. So it needn''t to convert from remap format to normal ioapic format. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2013 Jan 17
1
[PATCH] x86, Allow x2apic without IR on VMware platform.
Please consider this patch to allow x2apic without IR support when running on VMware platform. Tested on top of 3.8-rc3. Thanks, Alok -- Allow x2apic without IR on VMware platform. From: Alok N Kataria <akataria at vmware.com> This patch updates x2apic initializaition code to allow x2apic on VMware platform even without interrupt remapping support. The hypervisor_x2apic_available hook
2013 Jan 17
1
[PATCH] x86, Allow x2apic without IR on VMware platform.
Please consider this patch to allow x2apic without IR support when running on VMware platform. Tested on top of 3.8-rc3. Thanks, Alok -- Allow x2apic without IR on VMware platform. From: Alok N Kataria <akataria at vmware.com> This patch updates x2apic initializaition code to allow x2apic on VMware platform even without interrupt remapping support. The hypervisor_x2apic_available hook
2018 Jul 03
1
multiple devices in the same iommu group in L1 guest
Hi, I have a guest enabled vIOMMU, but on the guest there are several devices in the same iommu group. Could someone help to check if I missed something? Thank you very much! 1. guest xml: # virsh edit q ... <os> <type arch='x86_64' machine='pc-q35-rhel7.5.0'>hvm</type> <loader readonly='yes' secure='yes'
2008 Oct 15
0
[PATCH] [VTD] Fix MSI-x interrupt remapping
MSI-x may have multiple vectors, however in current interrupt remapping code, one device only has one entry in interrupt remapping table. This patch adds ''remap_index'' in msi_desc structure to track its index in interrupt remapping table. Signed-off-by: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>
2012 Oct 24
5
[PATCH v3] IOMMU: keep disabled until iommu_setup() is called
The iommu is enabled by default when xen is booting and later disabled in iommu_setup() when no iommu is present. But under some circumstances iommu code can be called before iommu_setup() is processed. If there is no iommu available xen crashes. This can happen for example when panic(...) is called as introduced with the patch "x86-64: detect processors subject to AMD erratum #121 and
2011 Jan 21
11
[PATCH]x86:x2apic: Disable x2apic on x86-32 permanently
x86:x2apic: Disable x2apic on x86-32 permanently x2apic initialization on x86_32 uses vcpu pointer before it is initialized. As x2apic is unlikely to be used on x86_32, this patch disables x2apic permanently on x86_32. It also asserts the sanity of vcpu pointer before dereference to prevent further misuse. Signed-off-by: Fengzhe Zhang <fengzhe.zhang@intel.com> diff -r 02c0af2bf280
2007 May 31
4
[RFC][PATCH 4/6] HVM PCI Passthrough (non-IOMMU)
int.patch: - Supports only level-triggered interrupts. Edge interrupts support will be added shortly (should be fairly simple) - Change polarity trick: in order to reflect the external device''s assertion state, the ioapic pin gets its polarity changed whenever an interrupt occur. So an interrupt is generated when the _external_ line is asserted (then,
2013 Jan 29
3
[PATCH v4 2/2] Xen: Fix VMCS setting for x2APIC mode guest while enabling APICV
The "APIC-register virtualization" and "virtual-interrupt deliver" VM-execution control has no effect on the behavior of RDMSR/WRMSR if the "virtualize x2APIC mode" VM-execution control is 0. When guest uses x2APIC mode, we should enable "virtualize x2APIC mode" for APICV first. Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff --git
2008 Apr 28
2
[PATCH] Enable the x2APIC enhancement to Xen
On platforms which supports x2APIC, the patches enable this enhancement for Xen. The x2APIC specification is available at http://www.intel.com/products/processor/manuals/ http://download.intel.com/design/processor/specupdt/318148.pdf apicid_u8_2_u32.patch: changes the ''apicid'' from u8 to u32; x2apic.patch: replaces the traditional MMIO-style interface to the MSR-style one; uses
2013 May 02
0
[PATCH] apic/iommu: Correct grammar in error message and clarify its meaning
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- This affects Xen 4.2 and 4.1, so I propose it for backport. diff -r 24df082ff3e7 -r 7bc81065d2d5 xen/arch/x86/apic.c --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -970,8 +970,7 @@ void __init x2apic_bsp_setup(void) panic("Interrupt remapping could not be enabled while "
2013 Mar 12
14
vpmu=1 and running 'perf top' within a PVHVM guest eventually hangs dom0 and hypervisor has stuck vCPUS. Romley-EP (model=45, stepping=2)
This issue I am encountering seems to only happen on multi-socket machines. It also does not help that the only multi-socket box I have is an Romley-EP (so two socket SandyBridge CPUs). The other SandyBridge boxes I''ve (one socket) are not showing this. Granted they are also a different model (42). The problem is that when I run ''perf top'' within an SMP PVHVM guest,
2014 May 15
0
Bug#748052: Info received ( Bug#748052: Bug#748052: Bug#7480
Not sure I did the xen log correctly. I have this in /etc/default/grub now: GRUB_CMDLINE_XEN_DEFAULT="loglvl=all" And now here is xen dmesg: root at xen-3:~# xl dmesg (XEN) Xen version 4.3.0 (Debian 4.3.0-3+b1) (buildd-binet at buildd.debian.org) (gcc (Debian 4.8.2-8) 4.8.2) debug=n Wed Dec 4 07:43:54 UTC 2013 (XEN) Bootloader: GRUB 2.00-22 (XEN) Command line: placeholder
2011 Dec 12
0
[PATCH 1/4] ACPI: eliminate duplicate MADT parsing and unused SBF definitions
Use their proper counterparts in include/acpi/actbl*.h instead. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/ia64/xen/dom_fw_common.c +++ b/xen/arch/ia64/xen/dom_fw_common.c @@ -347,7 +347,7 @@ struct fake_acpi_tables { struct acpi_table_header dsdt; uint8_t aml[8 + 11 * MAX_VIRT_CPUS]; struct acpi_table_madt madt; - struct acpi_table_lsapic lsapic[MAX_VIRT_CPUS]; +
2014 May 16
4
Bug#748052: dom0 USB failing with "ehci-pci: probe of 0000:00:1d.0 failed with error -110"
(copying xen-devel, full logs are at bugs.debian.org/748052, this is Debian Jessie, Xen 4.3.0 and Linux 3.13 Mike also reported that Debian Wheezy Xen 4.1.4 didn't work either, not clear which kernel that was with though, Wheezy's 3.2 or Jessie's 3.13) On Thu, 2014-05-15 at 10:11 -0700, Mike Egglestone wrote: > Here are some results with (now) the latest BIOS version 41. (was >
2013 Apr 16
0
Re: XSA-36 / howto fix broken IVRS ACPI table
I have the same motherboard. The chipset has 2 IOAPICs: one in the NB (00:00.1), and another in the SB (00:14.0). As currently configured by the BIOS, the NB IOAPIC is _entirely_ disabled, with only the SB IOAPIC enabled and configured. From 48693.pdf, it would seem that the NB is improperly configured, as 6.4.1 recommends that "The IOAPIC should be enabled by the system BIOS and the
2014 May 15
0
Bug#748052: Bug#748052: Bug#748052: Bug#748052: xen-hypervisor-4.3-a
Ian Campbell <ijc at hellion.org.uk> writes: #Please boot with loglvl=all on the hypervisor command line for this too. No problem Ian, Here are some results with (now) the latest BIOS version 41. (was version 35) This is a fresh new install of Debian "Testing" non production server. Just wanted to run some test domU's. Changing USB ports, no effect. I even tried a different
2013 Oct 30
1
[PATCH] x86/ACPI/x2APIC: guard against out of range ACPI or APIC IDs
Other than for the legacy APIC, the x2APIC MADT entries have valid ranges possibly extending beyond what our internal arrays can handle, and hence we need to guard ourselves against corrupting memory here. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/acpi/boot.c +++ b/xen/arch/x86/acpi/boot.c @@ -97,7 +97,20 @@ acpi_parse_x2apic(struct acpi_subtable_h
2011 Feb 11
4
Xen hypervisor failed to startup when booting CPUs
Hi Folks: I run into a problem when enabling Xen in next generation server platforms with Xen c/s is 21380. Xen reported "CPU Not responding" when booting up 32 CPUs( 2 sockets with 8 cores/16threads total). The log files belonging showed something wrong with APCI. So I added x2apic=0 in the xen grub line, but the symptom remained. However, Native RHEL5.5 can