Displaying 20 results from an estimated 10000 matches similar to: "EFER in HVM guests"
2013 Jul 10
2
[PATCH] x86/HVM: key handler registration functions can be __init
This applies to both SVM and VMX.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -310,7 +310,7 @@ static struct keyhandler vmcb_dump_keyha
.desc = "dump AMD-V VMCBs"
};
-void setup_vmcb_dump(void)
+void __init setup_vmcb_dump(void)
{
register_keyhandler(''v'',
2006 Feb 18
4
[PATCH] HVM x86_32 PAE guest support on 64-bit Xen
The patch enables x86_32 PAE unmodified guests on 64-bit Xen when the
hvm feature is present. We tested only Linux at this point, and we''ll
improve the functionality as we test other guests.
The SVM needs the equivalent changes to the vmc.c to get this
functionality working, but this patch does not break the build.
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
2012 May 30
12
[PATCH v2 0/4] XEN: fix vmx exception mistake
Changes from v1:
- Define new struct hvm_trap to represent information of trap, include
instruction length.
- Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of
wrappers around that function for existing callers, so that their parameter
lists actually *shrink*.
This series of patches fix the mistake for debug exception(#DB), overflow
exception(#OF) and INT3(#BP),
2012 May 24
11
[PATCH 0/3] XEN: fix vmx exception mistake
This series of patches fix the mistake for debug exception(#DB), overflow
exception(#OF) and INT3(#BP), INTn instruction emulation.
Introduce new function vmx_inject_sw_exception() which deliver the software
excetion, software interrupt and privileged software exception. Split hardware
exception as a seperate function(old function vmx_inject_hw_exception()).
Also Passed down intruction length
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2008 Feb 01
1
DR7 and CR4
Hi, I''m trying to verify that the Xen I''m running is patched against
the all the known published bugs. I''m running Fedora 7, which means
I''m running Xen 3.1.2. I''ve checked the changelog in the Fedora
package, and I can verify that all the bugs I''ve found are fixed
except for one.
http://www.securityfocus.com/bid/27219
2011 Jan 31
9
[PATCH][SVM] Fix 32bit Windows guest VMs save/restore
The attached patch fixes the save/restore issue seen with 32bit Windows
guest VMs. The root cause is that current Xen doesn''t intercept
SYSENTER-related MSRs for 32bit guest VMs. As a result, the
guest_sysenter_xxx fields contain incorrect values and shouldn''t be used
for save/restore. This patch checks the LMA bit of EFER register in the
save/restore code path.
Please apply it
2013 Apr 09
39
[PATCH 0/4] Add posted interrupt supporting
From: Yang Zhang <yang.z.zhang@Intel.com>
The follwoing patches are adding the Posted Interrupt supporting to Xen:
Posted Interrupt allows vAPIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to guest, if target vcpu is running,
update Posted-interrupt requests bitmap and send a notification event
to the vcpu. Then the vcpu will handle this
2012 May 14
7
[PATCH v3] Fix the mistake of exception execution
Fix the mistake for debug exception(#DB), overflow exception(#OF; generated by INTO) and int 3(#BP) instruction emulation.
For INTn (CD ib), it should use type 4 (software interrupt).
For INT3 (CC; NOT CD ib with ib=3) and INTO (CE; NOT CD ib with ib=4), it should use type 6 (software exception).
For other exceptions (#DE, #DB, #BR, #UD, #NM, #TS, #NP, #SS, #GP, #PF, #MF, #AC, #MC, and #XM), it
2006 Apr 06
20
[RFC] Hypercalls from HVM guests
Hi,
I am currently working on hypercalls from HVM guests. I started with a set
of Intel patches posted to xen-devel last September. I currently have code
running for both 32-bit and 64-bit HVM guests running on a 64-bit hypervisor.
I am curious why none of the original patches were accepted, and what I might
need to do to make them acceptable.
Is other work being done in this area that
2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
(Applies cleanly only on top of the previously sent SVM/LBR patch.)
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Index: 2007-08-08/xen/arch/x86/hvm/svm/svm.c
===================================================================
--- 2007-08-08.orig/xen/arch/x86/hvm/svm/svm.c 2007-08-08 11:40:11.000000000 +0200
+++ 2007-08-08/xen/arch/x86/hvm/svm/svm.c 2007-08-08 11:43:53.000000000 +0200
2005 Jun 11
5
[PATCH] Fixing iopl and ioperm
With this patch, x86 and x86-64 share ioport.c, fixing LTP iopl and
ioperm testcase failures (on both). We found an iopl testcase failing
even on x86 xenlinux.
Now x86-64 xenlinux should have the same results regarding the LTP
testcases (as far as we tested).
Signed-off-by: Li B Xin <li.b.xin@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Jun
---
Intel Open Source
2013 Jun 11
21
[PATCH] xen: fix initialization of wallclock time for PVHVM on migration
The initial values of the wallclock time in the shared info page are
set for PVHVM guests when the hypercall page is initialized, since the
hypercall page is not reinitialized on resume, the hypervisor
wallclock time is not properly set on resume.
Fix it by forcing an update of the wallclock values when the shared
info page is mapped.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
2005 Oct 31
2
[PATCH] Fix PAE shadow on a machine with RAM above 4G on x86_64 xen
Fix PAE shadow on a machine with RAM above 4G on x86_64 xen.
Currently, on a machine with RAM above 4G, we can not run 32bit VMX
guest on x86_64 xen, the root cause is that the PAE page table PDPT must
below 4G, this patch fixes this issue.
Also did some cleanup.
Signed-off-by: Xin Li <xin.b.li@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
2007 May 10
5
svm vmexit action sequence
Is there any particular reason why on 32-bits the order is VMLOAD then
HVM_SAVE_ALL_NOSEGREGS, while on 64-bits its is the other way around?
Trying to put in the saving of EAX, I could save a GET_CURRENT() on 32-bits
if I could order things the same way as on 64-bits.
Also, both versions seem to have a redundant GET_CURRENT() right after
the clgi/sti sequence - again, is there a particular reason
2006 Mar 02
2
[PATCH ] don''t compile HVM_DBG_LOG into xen by default
Don''t compile HVM_DBG_LOG into xen by default.
Signed-off-by: Xin Li <xin.b.li@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
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2010 Aug 18
4
RE: [PATCH 05/15] Nested Virtualization: core
> +
> +/* The exitcode is in native SVM/VMX format. The forced exitcode
> + * is in generic format.
> + */
Introducing a 3rd format of exitcode is over-complicated IMO.
> +enum nestedhvm_vmexits
> +nestedhvm_vcpu_vmexit(struct vcpu *v, struct cpu_user_regs *regs,
> + uint64_t exitcode)
> +{
I doubt about the necessary of this kind of wrapper.
In single layer
2007 Jun 24
4
It seems the "machine check exception handling" breaks HVM guest
Hi Jan Beulich,
> changeset 15414: 3cf5052ba5e5 x86: machine check exception handling
With the c/s, when creating HVM guest, I can only see a white Qemu
window. :(
Can you have a look? Thanks.
PS: the serial log follows:
(XEN) HVM1: pci dev 02:0 bar 14 size 00001000: f2000000
(XEN) HVM1: pci dev 03:0 bar 10 size 00000100: 0000c101
(XEN) HVM1: pci dev 03:0 bar 14 size 01000000:
2007 Jan 26
12
[Patch] the interface of invalidating qemu mapcache
HVM balloon driver or something, that''s under development, may decrease
or increase the machine memory that is taken by HVM guest; in IA32/IA32e
host, now Qemu maps the physical memory of HVM guest based on little
blocks of memory (the block size is 64K in IA32 host or 1M in IA32E
host). When HVM balloon driver decreases the reserved machine memory of
HVM guest, Qemu should unmap the
2007 Mar 28
2
[PATCH 2/3] User-space grant table device - main driver
A character device for accessing (in user-space) pages that have been
granted by other domains.
Signed-off-by: Derek Murray <Derek.Murray@cl.cam.ac.uk>
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