similar to: [PATCH] [VMX] Add support for Pause-Loop Exiting

X86: implement PCID/INVPCID for hvm This patch handle PCID/INVPCID for hvm: For hap hvm, we enable PCID/INVPCID, since no need to intercept INVPCID, and we just set INVPCID non-root behavior as running natively; For shadow hvm, we disable PCID/INVPCID, otherwise we need to emulate INVPCID at vmm by setting INVPCID non-root behavior as vmexit. Signed-off-by: Liu, Jinsong

... rather than per booting CPU. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -249,7 +249,8 @@ static int vmx_init_vmcs_config(void) if ( (_vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) && ple_gap == 0 ) { - printk("Disable Pause-Loop Exiting.\n"); +

.. avoiding the need to update them with atomic (locked) ops. Conversion here isn''t complete in the sense that many places still use the old per-CPU accessors (which are now redundant). Since the patch is already rather big, I''d prefer replacing those in a subsequent patch. While doing this, I also converted x86''s multicall macros to no longer require inclusion of

Change from v2: re-written code in ''vmx_intr_assist'' into if()/else if() sequence to make code change easy to review. Virtual interrupt delivery avoids Xen to inject vAPIC interrupts manually, which is fully taken care of by the hardware. This needs some special awareness into existing interrupr injection path: For pending interrupt from vLAPIC, instead of direct injection, we

This patch clarifies a vague statement in the SDM: the recommended maximum number of MSRs that can be automically switched by CPU during VMExit and VMEntry is 512, rather than 512 Bytes of MSRs. Depending on the CPU implementations, it may also support more than 512 MSRs to be auto switched. This can be calculated by (MSR_IA32_VMX_MISC[27:25] + 1) * 512. Signed-off-by: Wei Wang <wei.w.wang at

On Thu, Jan 31, 2013 at 12:11 AM, Marcelo Tosatti <mtosatti at redhat.com> wrote: > On Wed, Jan 30, 2013 at 11:21:08AM +0300, Andrey Korolyov wrote: >> On Wed, Jan 30, 2013 at 3:15 AM, Marcelo Tosatti <mtosatti at redhat.com> wrote: >> > On Tue, Jan 29, 2013 at 02:35:02AM +0300, Andrey Korolyov wrote: >> >> On Mon, Jan 28, 2013 at 5:56 PM, Andrey Korolyov

Changes from v2 to v3: - Use pfn_to_paddr() to get the address from frame number instead of doing shift directly. - Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields. - Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled. - Use clear_page() to set all 0 to the page instead of memset(). - Use domheap to allocate the

The "APIC-register virtualization" and "virtual-interrupt deliver" VM-execution control has no effect on the behavior of RDMSR/WRMSR if the "virtualize x2APIC mode" VM-execution control is 0. When guest uses x2APIC mode, we should enable "virtualize x2APIC mode" for APICV first. Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff --git

From: Yang Zhang <yang.z.zhang@Intel.com> With virtual unrestricted guest feature, L2 guest is allowed to run with PG cleared. Also, allow PAE not set during virtual vmexit emulation. Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> --- xen/arch/x86/hvm/hvm.c | 3 ++- xen/arch/x86/hvm/vmx/vvmx.c | 3 +++ 2 files changed, 5 insertions(+), 1 deletions(-) diff --git

This patch series enables the Last Branch Recording feature for the guest. Instead of trapping each LBR stack MSR access, the MSRs are passthroughed to the guest. Those MSRs are switched (i.e. load and saved) on VMExit and VMEntry. Test: Try "perf record -b ./test_program" on guest. Wei Wang (4): KVM/vmx: re-write the msr auto switch feature KVM/vmx: auto switch

This patch series enables the Last Branch Recording feature for the guest. Instead of trapping each LBR stack MSR access, the MSRs are passthroughed to the guest. Those MSRs are switched (i.e. load and saved) on VMExit and VMEntry. Test: Try "perf record -b ./test_program" on guest. Wei Wang (4): KVM/vmx: re-write the msr auto switch feature KVM/vmx: auto switch

[PATCH 4/8] HVM save restore: vcpu context support Signed-off-by: Zhai Edwin <edwin.zhai@intel.com> save/restore HVM vcpu context such as vmcs diff -r ee20d1905bde xen/arch/x86/domain.c --- a/xen/arch/x86/domain.c Thu Jan 11 16:40:55 2007 +0800 +++ b/xen/arch/x86/domain.c Thu Jan 11 16:46:59 2007 +0800 @@ -573,6 +573,7 @@ int arch_set_info_guest( else {

Il 28/02/2014 18:06, Waiman Long ha scritto: > On 02/26/2014 12:07 PM, Konrad Rzeszutek Wilk wrote: >> On Wed, Feb 26, 2014 at 10:14:24AM -0500, Waiman Long wrote: >>> Locking is always an issue in a virtualized environment as the virtual >>> CPU that is waiting on a lock may get scheduled out and hence block >>> any progress in lock acquisition even when the

Il 28/02/2014 18:06, Waiman Long ha scritto: > On 02/26/2014 12:07 PM, Konrad Rzeszutek Wilk wrote: >> On Wed, Feb 26, 2014 at 10:14:24AM -0500, Waiman Long wrote: >>> Locking is always an issue in a virtualized environment as the virtual >>> CPU that is waiting on a lock may get scheduled out and hence block >>> any progress in lock acquisition even when the

TPR shadow/threshold feature is important to speedup the boot time for Windows guest. Besides, it is a must feature for certain VMM. We map virtual APIC page address and TPR threshold from L1 VMCS, and synch it into shadow VMCS in virtual vmentry. If TPR_BELOW_THRESHOLD VM exit is triggered by L2 guest, we inject it into L1 VMM for handling. Besides, this commit fixes an issue for apic access

vmx_vmcs.c: fix inline asms for x86-64 Signed-Off-By: Benjamin Liu <benjamin.liu@intel.com> Signed-Off-By: Arun Sharma <arun.sharma@intel.com> diff -Nru a/xen/arch/x86/vmx_vmcs.c b/xen/arch/x86/vmx_vmcs.c --- a/xen/arch/x86/vmx_vmcs.c 2005-04-18 16:49:37 -07:00 +++ b/xen/arch/x86/vmx_vmcs.c 2005-04-18 16:49:37 -07:00 @@ -187,7 +187,7 @@ vmx_setup_platform(ed, ec);

Use the correct data type for x86-64 Signed-Off-By: Arun Sharma <arun.sharma@intel.com> diff -Nru a/xen/include/asm-x86/vmx.h b/xen/include/asm-x86/vmx.h --- a/xen/include/asm-x86/vmx.h 2005-04-18 16:49:37 -07:00 +++ b/xen/include/asm-x86/vmx.h 2005-04-18 16:49:37 -07:00 @@ -194,7 +194,7 @@ return 0; } -static inline int __vmread (unsigned int field, void *value) +static

Hi Bastian, Ian, while I was working on the recent batch of security updates I noticed that the obvious backport of the related patch caused an HVM guest to be crashed as soon as a user inside that guest tried to ptrace a child process. While talking to Jan, I realized that in 4.2 the inject exception code subtly changed in a way that treats TRAP_debug as a HW event (that is triggered by no

SVI should be restored in case guest is processing virtual interrupt while saveing a domain state. Otherwise SVI would be missed when virtual interrupt delivery is enabled. Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index ee2294c..38ff216 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@

We're using Samba 3.0.21a-1 on a CentOS 4.2 server (kernel 2.6.9-22.0.2.ELsmp); everything works more or less fine, it's functioning as the PDC with an OpenLDAP back end (setup essentially straight from the Idealx.org playbook), etc. We're trying to mount Windows shares to back them up, and getting "permission denied" errors when trying to read certain files from those