similar to: paging and shadow paging in xen: trying to implement split memory

Hi all, Can Xen hypervisor modify HVM domU's Shadow page table, under the dom0's context, like trapped from dom0's hypercall? I think it have to call 2 functions at least: guest_walk_tables() and flush_tlb_all(). Can these 2 functions called in dom0's context? In my test, if hypervisor tries to modify HVM's shadow page table, it will bring down the whole system. I am not

Hi, all Page offline can be used by many purpose, like memory offline, memory power management, proactive action when multiple CE error happen to one page etc. In virtualization environment without guest offline support, we think offline a page usually means replace the old page with a new one transparently to guest. Currently we are trying to add page offline support in Xen environment .

In sh_page_fault(), there are some code like following, why we think it is mmio only when paging_vcpu_mode_translate(v)? Thanks Yunhong Jiang /* What mfn is the guest trying to access? */ gfn = guest_l1e_get_gfn(gw.eff_l1e); gmfn = vcpu_gfn_to_mfn(v, gfn); mmio = (is_hvm_domain(d) && paging_vcpu_mode_translate(v) &&

The guest handle checks should use paging_* predicates, not shadow_*. Also tidy up a few places where p2m definitions were being imported via asm/guest_access.h -> asm/shadow.h -> asm/p2m.h Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com> -- Tim Deegan <Tim.Deegan@citrix.com> Principal Software Engineer, Citrix Systems (R&D) Ltd. [Company #02300071, SL9 0DZ, UK.]

Hi, I have a question about memory page tables in Xen. As far as I understood, every modification to page table will go through Xen(hypervisor). Is it so that all page tables are actually allocated in Xen(hypervisor) instead of guest OS(domain)? Also, is it the case that Xen(hypervisor) needs to maintain a page table for each process running in every domain? Thanks Haifeng

We''ve got reports of that change causing HVM data corruption issues. While I can''t see what''s wrong with the patch, I''d suggest at least reverting it from the 3.3 tree (which is what our code is based upon) for the time being. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

This patch series tidies up a few bits ofthe nested p2m code. The main thing it does is reorganize the locking so that most of the changes to nested p2m tables happen only under the p2m lock, and the nestedp2m lock is only needed to reassign p2m tables to new cr3 values. Changes since v1: - a few minor fixes - more sensible flushing policy in p2m_get_nestedp2m() - smoke-tested this time!

Hi all, Can some one tell me where phys_to_machine_mapping is being initialized for a domU having paging mode set to PG_translate. I see that, populate_physmap() after calling __alloc_xen_heap_pages only updates the machine_to_physmap but how is the mfn for the allocated page being updated/set for phys_to_machine_mapping?? I see that phys_to_machine_mapping is a #defined to RO_MPT_VIRT_START

I ran a bisect to find out when Windows XP 32 bit becomes unusably slow. And I found the changeset that caused it. ========== The problem: ========== Windows 8 64 bit and 32 bit run fast and fine in the newest xen versions. Windows XP 32 bit runs unusably slow in anything new that I built from xen-unstable, but runs fast in 4.1.2 and 4.1.3 stable. While it is running slow, "xm top" or

I''ve recently noticed that my windows crash dumps fail at around 40-50% under GPLPV. ''xm dmesg'' shows the following: (XEN) grant_table.c:350:d0 Iomem mapping not permitted ffffffffffffffff (domain 865) At first I thought that the cause was just a bug in my grant ref code but it just occurred to me that this could be happening when Windows tries to write out the

Hi, I am really confused about NPT walks for guest page table , and eager to know the details about it. It is treated as data writes even if the access itself is a code read in AMD NPT.I just want to know : is it the same in EPT? Could anyone help me? I would like to know that very much Thank you in advance Bo Ma _______________________________________________ Xen-devel mailing list

Just found this patch in house which I thought sent out already. :-) Still one thing remaining is to special case for UP guest which suffers overhead from this change... ---- Remove lock on first guest table walk Existing shadow fault path grabs big lock before walking guest tables, to ensure consistency with shadow content lest concurrent change from other vcpu in a bad OS. But this lock

This patch series includes a series of bugs related to p2m, ept, and PoD code which were found as part of our XenServer product testing. Each of these fixes actual bugs, and the 3.4-based version of the patch has been tested thoroughly. (There may be bugs in porting the patches, but most of them are simple enough as to make it unlikely.) Each patch is conceptually independent, so they can each

Hi all, I hope everyone is doing well. I just joined the list, and I've really enjoyed all I have read about asterisk so far. Unfortunately, I'm having a bit of trouble implementing this thing :). By the way ... I did my best to search the forums, and also to use google extensively, and while I have found pages with people with the same problem, ... The fix suggested on those sites,

And can we make p2m memory allocation from domain heap directly? -Xin _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This fixes a bug in changeset 22526:7a5ee3800417, where the wrong value is read when deciding whether to flush the VTd tables. The effect is minor: in situations where the p2m entry is changed but the mfn is the same, the VTd tables will be unnecessarily flushed. old_entry is left untouched in the second case, since having a present old_entry will cause the an unnecessary check to be taken at

Trying to migrate a 64bit PV guest with 64GB running medium to heavy load on xen 3.4.0, it is showing lot of soft lockups. The softlockups are causing dom0 reboot by the cluster FS. The hardware has 256GB and 32 CPUs. Looking into the hypervisor thru kdb, I see one cpu in sh_resync_all() while all other 31 appear spinning on the shadow_lock. I vaguely remember seeing some thread on this while

This patch series implements SMP boot for arch/arm, as far as getting all CPUs up and running the idle loop. Changes from v1: - moved barriers out of loop in udelay() - dropped broken GIC change in favour of explanatory comment - made the increment of ready_cpus atomic (I couldn''t move the increment to before signalling the next CPU because the PT switch has to happen between

Another bundle of issues from Coverity triage. The first one is in x86/mm, and looks scarier than it is. The others are all in xen/drivers and AFAICT are pretty minor. Cheers, Tim.