similar to: [PATCH 1/1] Xen PV support for hugepages

Dear R experts, I'm hoping someone can help me to interpret the results of building gam's with mgcv in R. Below are summaries of two gam's based on the same dataset. The first gam (named "gam.mod") has six predictor variables. The second gam (named "gam.mod2") is exactly the same except it is missing one of the predictor variables. What is confusing me is

Hello, I''m new to Xen and especially to the hypervisor code. I''m working off a 3.0.4.1 base and have the following questions regarding the memory management code for an x86, 32-bit platform (capable of supporting PAE). I''m doing some research into providing grant table hypercall support from a Windows 2003 HVM. I have made all the necessary changes to allow the

Adjustments deemed necessary to properly support PAE (only compile-tested). Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: 2007-01-11/tools/libxc/xc_ptrace.c =================================================================== --- 2007-01-11.orig/tools/libxc/xc_ptrace.c 2006-12-14 22:49:56.000000000 +0100 +++ 2007-01-11/tools/libxc/xc_ptrace.c 2007-01-12 14:10:45.000000000 +0100 @@

Hi all, Recently, I read codes about the shadow page table. I''m wondering whether the kernel has provided the function to revoke write access of all the shadows of one domain. If you know one with this function, please tell me about it. Thanks. BTW, I have my own idea to implement this. My idea is as follows: void sh_revoke_write_access_all(struct domain *d) {

Hi, In many places xen uses "unsigned long" instead of the l*_pgentry_t types to pass around page table entries. Here is a patch which fixes this in a number of places (mostly in shadow mode code). Thats what I''ve trapped in so far, maybe more of these patches follow. Fixing this is needed for adding PAE support to xen. In PAE paging mode the page table entries are 64 bit

This patch enables support of hugepages in a pv Xen environment. It is against the latest xen unstable tree on http://xenbits.xensource.com. The patch assumes the guest is passing a physically aligned hugepage. It does reference counting on all the underlying pages. Dave McCracken Oracle Corp. _______________________________________________ Xen-devel mailing list

While adding code to create the compatibility p2m table mappings it seemed to me that the creation of the native ones is restricted to memory below the 512G boundary - otherwise, additional L2 tables would need to be allocated (currently other memory following the one L2 page getting allocated would be blindly overwritten). While I realize that machines this big aren''t likely to be

Populate-on-demand: Check pages being returned by the balloon driver This patch series is the second result of my work last summer on decreasing fragmentation of superpages in a guests'' p2m when using populate-on-demand. This patch series is against 4.1; I''m posting it to get feedback on the viability of getting a ported version of this patch into 4.2. As with the previous

Here is a set of small patches that enables hugetlb on PV machines. They are against xen-unstable and linux-2.6.18-xen. The patches are specifically for x86_64. I originally had these patches working back in May, but recently for some reason my machine now refuses to boot the baseline xen-unstable, so I''ve been unable to verify them. However, they should still work. Comments, bug

1: correct LDT checks 2: add address validity check to guest_map_l1e() 3: use {rd,wr}{fs,gs}base when available 4: check for canonical address before doing page walks Signed-off-by: Jan Beulich <jbeulich@suse.com>

The PV superpage mapping feature has been in the hypervisor for a while now, but I''m not away of any use of this feature by an upstream guest kernel (e.g., and primarily of interest, pv_ops Linux). Am I mistaken, or is anyone looking into or interested in this? If the feature is unused we should remove it from the hypervisor in this development cycle, as it''s untested and is

This patch series includes a series of bugs related to p2m, ept, and PoD code which were found as part of our XenServer product testing. Each of these fixes actual bugs, and the 3.4-based version of the patch has been tested thoroughly. (There may be bugs in porting the patches, but most of them are simple enough as to make it unlikely.) Each patch is conceptually independent, so they can each

This patch series restores the use of superpages when restoring or migrating a VM, while retaining efficient batching of 4k pages when superpages are not appropriate or available. Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

There has been some progress, but still no joy. Definitely not intended for inclusion at this point. Tim, Wei, I added a Xen command line toggle to disable IOMMU and P2M table sharing. Tim, I verified that changes to p2m-pt.c don''t break shadow mode (64bit hypervisor and Win 7 guest). Hongkaixing, I incorporated your suggestion in patch 2, so I should add your Signed-off-by eventually.

Hi, V6: The only change from V5 is in patch #6: - changed comment to reflect autoxlate - removed a redundant ASSERT - reworked logic a bit so that get_page_from_gfn() is called with NULL for p2m type as before. arm has ASSERT wanting it to be NULL. Tim: patch 4 needs your approval. Daniel: patch 5 needs your approval. These patches implement PVH dom0. Patches 1 and 2

Hello, On Fri, Dec 09, 2016 at 05:35:45AM +0000, Li, Liang Z wrote: > > On 12/08/2016 08:45 PM, Li, Liang Z wrote: > > > What's the conclusion of your discussion? It seems you want some > > > statistic before deciding whether to ripping the bitmap from the ABI, > > > am I right? > > > > I think Andrea and David feel pretty strongly that we should

The first and third patches are cleaned up versions of an earlier v3 submission by Yang. 1: Nested VMX: check VMX capability before read VMX related MSRs 2: VMX: clean up capability checks 3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation 4: x86: make hvm_cpuid() tolerate NULL pointers Signed-off-by: Jan Beulich <jbeulich@suse.com>

This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of