similar to: [PATCH][HAP][2/2] fix CR4 initialization when hap is on

Hi, Attached patch implements the VMCB cleanbits SVM feature. Upcoming AMD CPUs introduce them and they are basically hints for the CPU which vmcb values can be re-used from the previous VMRUN instruction. Each bit represents a certain set of fields in the VMCB. Setting a bit tells the cpu it can re-use the cached value from the previous VMRUN. Clearing a bit tells the cpu to reload the values

This patch changes hap parameter from boolean to integer. So users can disable and enable hap using "hap=0" and "hap=1". It also prints out nested paging message under SVM. Signed-off-by: Wei Huang <wei.huang2@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

The attached patch fixes the save/restore issue seen with 32bit Windows guest VMs. The root cause is that current Xen doesn''t intercept SYSENTER-related MSRs for 32bit guest VMs. As a result, the guest_sysenter_xxx fields contain incorrect values and shouldn''t be used for save/restore. This patch checks the LMA bit of EFER register in the save/restore code path. Please apply it

Also, correct a copy&paste error in the documentation. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- This patch has been in the XenServer patch queue for a long time. It is more for debugging purposes than anything else, but is still proving to be valuable for tracking down bugs with HVM paging operations. diff -r 5af4f2ab06f3 -r e6ec5b2b717f

Hi, I have hybrid smp running with autoxlate. However, without autoxlate, I am running into issues realted to TLB flush. The guest in this case makes multicalls as part of which cache is flushed (__do_update_va_mapping, etc..). However, the guest is using VPIDs and it is getting complicated. I can just xen not do any TLB management and let the guest just do it after return from the hypercall.

George, since you asked on Friday, I though about the situation some more over the weekend. On PV, the requirement to trap all INs and OUTs is a result from us needing the enforce two levels of restrictions - Xen''s and the guest kernel''s. I.e. we can''t make use of the hardware''s access control mechanisms, as we can''t put two I/O bit maps in place, and

Ever since xen-unstable cset 14308 ("pci back: Fix registration of of filters on subsections of config space") I''ve been getting an MCA on the *2nd* boot of a driver domain using an e1000 NIC. Cset 14308 allowed the proper setup of the PM control registers, so the NIC is put in the D3 power state when the driver domain shuts down. Unfortunately, pci_set_power_state()

VMCB physical address is useful for hardware debug. This small patch dumps VMCB physical address. Signed-off-by: Wei Huang <wei.huang2@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi, I''m trying to verify that the Xen I''m running is patched against the all the known published bugs. I''m running Fedora 7, which means I''m running Xen 3.1.2. I''ve checked the changelog in the Fedora package, and I can verify that all the bugs I''ve found are fixed except for one. http://www.securityfocus.com/bid/27219

There is a race condition between XEN_DOMCTL_SHADOW_OP_ENABLE_LOGDIRTY and HVMOP_track_dirty_vram hypercall. Although HVMOP_track_dirty_vram is called many times from qemu-dm which is connected via VNC, XEN_DOMCTL_SHADOW_OP_ENABLE_LOGDIRTY is called only once from a migration process (e.g. xc_save, libxl-save-helper). So the race seldom happens, but the following cases are possible.

This patch implements flush by asid feature for AMD CPUs. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd

And can we make p2m memory allocation from domain heap directly? -Xin _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This applies to both SVM and VMX. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -310,7 +310,7 @@ static struct keyhandler vmcb_dump_keyha .desc = "dump AMD-V VMCBs" }; -void setup_vmcb_dump(void) +void __init setup_vmcb_dump(void) { register_keyhandler(''v'',

Hi Ian, There have been a lot of interest on gfx passthru recently. This patch enables ATI VBIOS in passthru mode. The guest VM system BIOS (including Windows boot logo) can now show in passthru screen. We have tested with various Windows and Linux guest VMs. Please help review it. We are also looking forward to comments and suggestions from Xen community users. Signed-off-by: Wei Huang

Future AMD SVM supports a new feature called flush by ASID. The idea is to allow CPU to flush TLBs associated with the ASID assigned to guest VM. So hypervisor doesn''t have to reassign a new ASID in order to flush guest''s VCPU. Please review it. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro

Attached are the patches to support super page with EPT. We only support 2M size. And shadow may still work fine with 4K pages. The patches can be split into 3 parts. Apply order is as attached. tool.diff To allocate 2M physical contiguous memory in guest except the first 2M and the last 2M. The first 2M covers special memory, and Xen use the last few pages in guest memory to do special

I am adding interrupt support for LWP, whose spec is available at http://support.amd.com/us/Processor_TechDocs/43724.pdf. Basically OS can specify an interrupt vector in LWP_CFG MSR; the interrupt will be triggered when event buffer overflows. For HVM guests, I want to re-inject this interrupt back into the guest VM. Here is one idea similar to virtualized PMU: It first registers a special

Hi Everyone, I am running 3.2.1 on Centos 5.2 with HAP enabled, NUMA enabled, ACPI enabled and the dom0 allocated 512Mb. I have setup a single core 1Gb VM for performance testing under Windows 2008 Server. Most CPU results are within a few percent of theoretical max but Memory performance is about half what I expected. I get 3.22Gb/Sec Sandra 2009 Memory performance for a single Opteron 8350

flight 5665 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5665/ Regressions :-( Tests which did not succeed and are blocking: build-amd64-oldkern 4 xen-build fail REGR. vs. 5640 build-amd64 4 xen-build fail REGR. vs. 5640 build-i386-oldkern 4 xen-build fail REGR. vs. 5640

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list