similar to: [PATCH][QEMU] serial save load fix

Currently we are trying to read the same value twice in the serial_load function, this patch fixes that. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- diff --git a/hw/serial.c b/hw/serial.c index 6ae3b20..d090a2b 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -744,7 +744,6 @@ static int serial_load(QEMUFile *f, void *opaque, int version_id)

This is the xen part of the kthread patch This part simply fixes a compiler warning we get when compiling for a uniprocessor guest kernel. Signed-off-by: Ben Guthro <bguthro@virtualiron.com> Signed-off-by: Robert Phillips <rphillips@virtualiron.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

Implement bindings for virtio save/load. Use them in virtio pci. Signed-off-by: Michael S. Tsirkin <mst at redhat.com> --- hw/virtio-pci.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++- hw/virtio.c | 31 ++++++++++++++----------------- hw/virtio.h | 4 ++++ 3 files changed, 66 insertions(+), 18 deletions(-) diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index

Implement bindings for virtio save/load. Use them in virtio pci. Signed-off-by: Michael S. Tsirkin <mst at redhat.com> --- hw/virtio-pci.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++- hw/virtio.c | 31 ++++++++++++++----------------- hw/virtio.h | 4 ++++ 3 files changed, 66 insertions(+), 18 deletions(-) diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index

Implement bindings for virtio save/load. Use them in virtio pci. Signed-off-by: Michael S. Tsirkin <mst at redhat.com> --- Is anyone working to fill in load/save bindings so that saving virtio devices works? Here's a trivial patch to do this (this one is on top of my MSI-X patchset). Comments? hw/virtio-pci.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++- hw/virtio.c |

Implement bindings for virtio save/load. Use them in virtio pci. Signed-off-by: Michael S. Tsirkin <mst at redhat.com> --- Is anyone working to fill in load/save bindings so that saving virtio devices works? Here's a trivial patch to do this (this one is on top of my MSI-X patchset). Comments? hw/virtio-pci.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++- hw/virtio.c |

This patch provides a simple way to break out of a tight loop and bug: from the hypervisor monitor press ctrl-A, ctrl-A, ctrl-Z Signed-off-by: Robert S. Phillips (rphillips@virtualiron.com) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

The code, below, in rdmsr_hypervisor_regs (in xen/arch/x86/traps.c) looks wrong. (The same code is in wrmsr_hypervisor_regs.) int rdmsr_hypervisor_regs( uint32_t idx, uint32_t *eax, uint32_t *edx) { idx -= 0x40000000; if ( idx > 0 ) return 0; ... The intent, apparently, is that the function should return zero if the original idx exceeds 0x40000000. However because idx is

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at

Extend virtio to support many interrupt vectors, and rearrange code in preparation for multi-vector support (mostly move reset out to bindings, because we will have to reset the vectors in transport-specific code). Actual bindings in pci, and use in net, to follow. Load and save are not connected to bindings yet, so they are left stubbed out for now. Signed-off-by: Michael S. Tsirkin <mst at