similar to: [PATCH] x86: adjust reserved bit page fault handling

Displaying 20 results from an estimated 100 matches similar to: "[PATCH] x86: adjust reserved bit page fault handling"

2013 Oct 10
10
[PATCH 0/4] x86: XSA-67 follow-up
1: correct LDT checks 2: add address validity check to guest_map_l1e() 3: use {rd,wr}{fs,gs}base when available 4: check for canonical address before doing page walks Signed-off-by: Jan Beulich <jbeulich@suse.com>
2007 Apr 27
1
VMASST_TYPE_writable_pagetables on translated domains?
Isn''t the writeable page table support intended only for non-translated domains? If so, shouldn''t fixup_page_fault() check for this, or the setting of the assist bit and the PG_translate be respectively validated? If not, aren''t there bits missing in ptwr_do_page_fault()? Jan _______________________________________________ Xen-devel mailing list
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.
2009 Jul 15
0
[PATCH] rename for_each_cpu() to for_each_possible_cpu()
... to be more precise in naming, and also to match Linux. Signed-off-by: Jan Beulich <jbeulich@novell.com> --- 2009-07-10.orig/xen/arch/ia64/linux-xen/perfmon.c 2009-05-27 13:54:05.000000000 +0200 +++ 2009-07-10/xen/arch/ia64/linux-xen/perfmon.c 2009-07-15 10:02:08.000000000 +0200 @@ -7313,7 +7313,7 @@ xenpfm_context_create(XEN_GUEST_HANDLE(p goto out; /* XXX fmt */ -
2007 Jul 29
2
Execution Flow when Guest Page Fault
I would like to know approximately the overall execution flow when the guest O/S page fault - how is the page fault transfer to a page fault in the host O/S? Thanks. _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2020 Nov 03
0
[patch V3 19/37] mm/highmem: Remove the old kmap_atomic cruft
All users gone. Signed-off-by: Thomas Gleixner <tglx at linutronix.de> --- include/linux/highmem.h | 63 +++--------------------------------------------- mm/highmem.c | 7 ----- 2 files changed, 5 insertions(+), 65 deletions(-) --- a/include/linux/highmem.h +++ b/include/linux/highmem.h @@ -86,31 +86,16 @@ static inline void kunmap(struct page *p * be used in IRQ
2010 Feb 24
4
Re: [Xen-changelog] [xen-3.4-testing] x86: Generalise BUGFRAME_dump mechanism to allow polled UART irq to
FYI, I see the following build error with this patch... MRJ ---- new warnings/errors for xen ---- keyhandler.c: In function `__dump_execstate'': keyhandler.c:96: warning: asm operand 1 probably doesn''t match constraints gmake[5]: *** [keyhandler.o] Error 1 gmake[4]: *** [/tank/ws/xvm-3.4.3/xen.hg/xen/common/built_in.o] Error 2 gmake[3]: *** [/tank/ws/xvm-3.4.3/xen.hg/xen/xen]
2007 Dec 21
0
[kvm-devel] [Virtio-for-kvm] [PATCH 6/13] [Mostly resend] virtio additions
From c1e1126c39fe107f68adec196d4e558a14540939 Mon Sep 17 00:00:00 2001 From: Anthony Liguori <aliguori@us.ibm.com> Date: Mon, 12 Nov 2007 21:30:26 -0600 Subject: [PATCH] virtio: use an hrtimer for tx coalescing. Not sure why hrtimer's cb_mode only exists with CONFIG_HIGH_RES_TIMERS; that seems like a bug to me. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> ---
2007 Dec 21
0
[kvm-devel] [Virtio-for-kvm] [PATCH 6/13] [Mostly resend] virtio additions
From c1e1126c39fe107f68adec196d4e558a14540939 Mon Sep 17 00:00:00 2001 From: Anthony Liguori <aliguori@us.ibm.com> Date: Mon, 12 Nov 2007 21:30:26 -0600 Subject: [PATCH] virtio: use an hrtimer for tx coalescing. Not sure why hrtimer's cb_mode only exists with CONFIG_HIGH_RES_TIMERS; that seems like a bug to me. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> ---
2009 Aug 06
2
[PATCH] hvm emul: fix cmpxchg emulation to use an atomic operation
# HG changeset patch # User Patrick Colp <Patrick.Colp@citrix.com> # Date 1249555177 -3600 # Node ID 684c8fc69d658d058246eb9edfc8eba187ae6f2c # Parent 68e8b8379244e293c55875e7dc3692fc81d3d212 hvm emul: fix cmpxchg emulation to use an atomic operation. Currently HVM cmpxchg emulation is done by doing a normal emulated write, which is not atomic. This patch changes it to use a cmpxchg
2010 Aug 02
4
softirq warnings when calling dev_kfree_skb_irq - bug in conntrack?
Hi, I''m seeing this in the current linux-next tree: ------------[ cut here ]------------ WARNING: at kernel/softirq.c:143 local_bh_enable+0x40/0x87() Modules linked in: xt_state dm_mirror dm_region_hash dm_log microcode [last unloaded: scsi_wait_scan] Pid: 0, comm: swapper Not tainted 2.6.35-rc6-next-20100729+ #29 Call Trace: <IRQ> [<ffffffff81030de3>]
2020 Nov 03
0
[patch V3 06/37] highmem: Provide generic variant of kmap_atomic*
The kmap_atomic* interfaces in all architectures are pretty much the same except for post map operations (flush) and pre- and post unmap operations. Provide a generic variant for that. Signed-off-by: Thomas Gleixner <tglx at linutronix.de> Cc: Andrew Morton <akpm at linux-foundation.org> Cc: linux-mm at kvack.org --- V3: Do not reuse the kmap_atomic_idx pile and use kmap_size.h right
2013 Apr 09
39
[PATCH 0/4] Add posted interrupt supporting
From: Yang Zhang <yang.z.zhang@Intel.com> The follwoing patches are adding the Posted Interrupt supporting to Xen: Posted Interrupt allows vAPIC interrupts to inject into guest directly without any vmexit. - When delivering a interrupt to guest, if target vcpu is running, update Posted-interrupt requests bitmap and send a notification event to the vcpu. Then the vcpu will handle this
2020 Nov 03
0
[patch V3 24/37] sched: highmem: Store local kmaps in task struct
Instead of storing the map per CPU provide and use per task storage. That prepares for local kmaps which are preemptible. The context switch code is preparatory and not yet in use because kmap_atomic() runs with preemption disabled. Will be made usable in the next step. The context switch logic is safe even when an interrupt happens after clearing or before restoring the kmaps. The kmap index in
2005 May 24
28
Xen & Transmeta (from xen-users)
All- With suggestions from Ian and previous posts on this list, I''ve been investigating why Xen causes a Transmeta-based system to reboot immediately.. I''ve added instrumentation to xen/arch/x86/boot/x86_32.S (a collection of ''.asciz "foo"'' statements) hoping to locate a point of failure.. and it dies sometime before this code is run.. At what point
2020 Nov 03
45
[patch V3 00/37] mm/highmem: Preemptible variant of kmap_atomic & friends
Following up to the discussion in: https://lore.kernel.org/r/20200914204209.256266093 at linutronix.de and the second version of this: https://lore.kernel.org/r/20201029221806.189523375 at linutronix.de this series provides a preemptible variant of kmap_atomic & related interfaces. This is achieved by: - Removing the RT dependency from migrate_disable/enable() - Consolidating all
2020 Nov 03
45
[patch V3 00/37] mm/highmem: Preemptible variant of kmap_atomic & friends
Following up to the discussion in: https://lore.kernel.org/r/20200914204209.256266093 at linutronix.de and the second version of this: https://lore.kernel.org/r/20201029221806.189523375 at linutronix.de this series provides a preemptible variant of kmap_atomic & related interfaces. This is achieved by: - Removing the RT dependency from migrate_disable/enable() - Consolidating all
2020 Nov 03
45
[patch V3 00/37] mm/highmem: Preemptible variant of kmap_atomic & friends
Following up to the discussion in: https://lore.kernel.org/r/20200914204209.256266093 at linutronix.de and the second version of this: https://lore.kernel.org/r/20201029221806.189523375 at linutronix.de this series provides a preemptible variant of kmap_atomic & related interfaces. This is achieved by: - Removing the RT dependency from migrate_disable/enable() - Consolidating all
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):
2005 Mar 14
4
[patch/unstable] page table cleanups
Hi, In many places xen uses "unsigned long" instead of the l*_pgentry_t types to pass around page table entries. Here is a patch which fixes this in a number of places (mostly in shadow mode code). Thats what I''ve trapped in so far, maybe more of these patches follow. Fixing this is needed for adding PAE support to xen. In PAE paging mode the page table entries are 64 bit