similar to: Re: [PATCH][RESEND] only BSP can really do clear_all_shadow_status

only BSP can really do clear_all_shadow_status. This fixes SMP IA32 VMX guest booting on IA32 xen. Signed-off-by: Xin Li <xin.b.li@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

G92's seem to require some additional bit of initialization before the BSP engine can work. It feels like clocks are not set up for the underlying VLD engine, which means that all commands submitted to the xtensa chip end up hanging. VP seems to work fine though. This still allows people to force-enable the bsp engine if they want to play around with it, but makes it harder for the card to

Hi Keir: IA64 has used foreign mapping interface like IA32, so this patch is not need. Pls don’t check in it. Sorry for the inconvenience. Good good study,day day up ! ^_^ -Wing(zhang xin) OTC,Intel Corporation ________________________________ From: Zhang, Xing Z Sent: 2006年12月5日 11:15 To: xen-devel@lists.xensource.com; Keir Fraser Subject: [xen-devel][Patch] add auto

For NV98+, BSP/VP/PPP are all FUC-based engines. Hook them all up in the same way as NVC0, but with a couple of different values. Also make sure that the PPP engine is handled in the fifo/mc/vm. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- It seems like VP4.0 is basically working here... only mpeg2/vc1 work, but I'm pretty sure that's just a user-side issue. My guess is

On Wed, Jun 5, 2013 at 3:05 AM, Maarten Lankhorst <maarten.lankhorst at canonical.com> wrote: > Hey, > > Op 04-06-13 20:38, Ilia Mirkin schreef: >> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >>> These chipsets include the VP2 engine which is composed of a bitstream >>> processor (BSP) that decodes H.264 and a video

On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > These chipsets include the VP2 engine which is composed of a bitstream > processor (BSP) that decodes H.264 and a video processor (VP) which can > do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are > driven by separate xtensa chips embedded in the hardware. This patch > provides the

These chipsets include the VP2 engine which is composed of a bitstream processor (BSP) that decodes H.264 and a video processor (VP) which can do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are driven by separate xtensa chips embedded in the hardware. This patch provides the mechanism to load the kernel for the xtensa chips and provide the necessary interactions to do the rest of

https://bugs.freedesktop.org/show_bug.cgi?id=95330 Bug ID: 95330 Summary: [NV84] Hangs with gr: DATA_ERROR [INVALID_BITFIELD], TRAP_PROP [RT_FAULT], fb: trapped write [PGRAPH] [PROP] [RT0] [PAGE_NOT_PRESENT], bsp: Watchdog interrupt, engine hung Product: xorg Version: unspecified

Hey, Op 04-06-13 20:38, Ilia Mirkin schreef: > On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >> These chipsets include the VP2 engine which is composed of a bitstream >> processor (BSP) that decodes H.264 and a video processor (VP) which can >> do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are >> driven by separate

>5. LTP testing might run very slow in SMP VTI Domain with credit scheduler. If binding VTI >and Xen0 vcpu, this bug won''t be there. Hi keir, In credit scheduler, two vcpus in the same domain may be scheduled on the same CPU. For instance, vcpu0 and vcpu1 are running on the same CPU, vcpu0 is doing spin_lock in guest, then time slice is due, vcpu0 is scheduled out before doing

These chipsets include the VP2 engine which is composed of a bitstream processor (BSP) that decodes H.264 and a video processor (VP) which can do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are driven by separate xtensa chips embedded in the hardware. This patch provides the mechanism to load the kernel for the xtensa chips and provide the necessary interactions to do the rest of

Cleanup vmx vmexit handler. Current code doesn''t handle vmexits caused by triple fault, INIT, SIPI, etc, which are listed in IA32 Architecture System Programming Guide 2, Appendix I VMX Basic Exit Reasons, and calls __hvm_bug() when not handling such cases, actually domain crash should be good enough. Also various coding style cleanups. Signed-off-by: Xin Li <xin.b.li@intel.com>

This patch clean up VMX builder. Since now we have vmxloader, old code loading linux kernel directly is not needed. 1. remove linux parameters. 2. remove init ramdisk. 3. remove e820 memmap config file parse. Also e820 map handling code is changed in vmx_setup_platform. 4. remove provisional GDT, and construct_init_guest_vmcs is updated greatly. 5. remove some ugly tailing space. Thanks Keir for

Keir, It''s a resending patch for the timeout mechanism to deal with the shared interrupt issue for vt-d enabled hvm guest. We modify the patch following your comments last time and make some other small fix: 1) We don''t touch the locking around the hvm_dpci_eoi(). 2) Remove the HZ from the TIME_OUT_PERIOD macro which may confuse others. 3) Add some

I see only qemu-img consumming some CPU and MEM : 25897 qemu 20 0 5825976 2,429g 4368 S 5,6 32,2 603:09.34 qemu-kvm I have indeed, some nfs errors : [475747.296041] nfs: server 192.203.100.247 not responding, still trying [475747.772022] nfs: server 192.203.100.247 not responding, still trying [475747.848023] nfs: server 192.203.100.247 not responding, still trying [475747.849014]

The script as worked perfectly : + size=100G + virt-builder fedora-20 --size 100G -o /tmp/in.img gpg: Signature faite le mar. 08 juil. 2014 11:11:00 CEST avec la clef RSA d'identifiant E1B768A0 gpg: Bonne signature de « Richard W.M. Jones <rjones@redhat.com> » gpg: alias « Richard W.M. Jones <rich@annexia.org> » gpg: Attention : cette clef n'est pas certifiée

On Wed, Oct 15, 2014 at 03:23:39PM +0000, VONDRA Alain wrote: > I see only qemu-img consumming some CPU and MEM : > > 25897 qemu 20 0 5825976 2,429g 4368 S 5,6 32,2 603:09.34 qemu-kvm That's qemu, not qemu-img. > I have indeed, some nfs errors : > > [475747.296041] nfs: server 192.203.100.247 not responding, still trying > [475747.772022] nfs: server

flight 12043 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/12043/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-amd64-i386-rhel6hvm-amd 7 redhat-install fail REGR. vs. 12031 test-amd64-i386-rhel6hvm-intel 7 redhat-install fail REGR. vs. 12031 test-amd64-i386-xl-winxpsp3-vcpus1 7

So, Keir, can you please check in this patch? Thanks Yunhong Jiang >-----Original Message----- >From: xen-devel-bounces@lists.xensource.com >[mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of >John Clemens >Sent: Tuesday, February 28, 2006 1:35 AM >To: Jiang, Yunhong >Cc: Li, Xin B; xen-devel@lists.xensource.com >Subject: [Xen-devel] Re: [PATCH] Fix qemu-dm

Add SMP support to Xen host S3 Signed-off-by Kevin Tian <kevin.tian@intel.com> diff -r 1539f5a2b3ba xen/arch/x86/acpi/power.c --- a/xen/arch/x86/acpi/power.c Tue Jun 26 18:05:22 2007 -0400 +++ b/xen/arch/x86/acpi/power.c Tue Jun 26 19:44:36 2007 -0400 @@ -25,6 +25,7 @@ #include <xen/sched.h> #include <xen/domain.h> #include <xen/console.h> +#include