similar to: [VTD][PATCH] Fix addr_to_dma_page() and rmrr mapping issues

During parsing DMAR table, if find RMRR is incorrect, return error. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch maps RMRR in intel_iommu_add_device() if the device has RMRR; move domain_context_mapping() to be in front of list_move() in reassign_device_ownership(). Currently, hypervisor sets up devices and RMRR for dom0, and dom0 also adds devices for itself via hypercall. This is obviously duplicate. In order to allow old dom0 kernels to work with iommu-capable platforms, maybe it cannot be

Hello, I''m also seeing this exact same problem. I''ve posted on xen-users, but did not get an answer. Venkat seems to be experiencing the same problem as me. I have the latest BIOS for my motherboard DQ35JO. (BIOS ver 933) I''m running a Q6600 as well. It hangs at "Brought up 4 CPUs." I''ve tried all sorts of combinations of Xen versions and kernels to

This patch removes a wrong if condition judgement to setup rmrr identify mapping for guests, and passes page count rather than address size to iommu_flush_iotlb_psi(). Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Anthony Xu <Anthony.xu@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

hi, I am trying the Xen unstable on X48 chipset these days but it failed due to an corrupted RMRR table in the ACPI. The following is the acpi dump of DMAR. DMAR @ 0x7fef1000 0000: 44 4d 41 52 20 01 00 00 01 d1 49 4e 54 45 4c 20 DMAR .....INTEL 0010: 44 58 34 38 42 54 32 20 12 06 00 00 4d 53 46 54 DX48BT2 ....MSFT 0020: 13 00 00 01 23 00 00 00 00 00 00 00 00 00 00 00 ....#...........

For IOAPIC interrupt remapping, it only needs to remap ioapci RTE, should not remap other IOAPIC registers, which are IOAPIC ID, VERSION and Arbitration ID. This patch adds the check for this and only remap ioapci RTE. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing

If pass-through field in extended capability register is set, set pass-through translation type for Dom0, that means DMA requests with Untranslated addresses are processed as pass-through in Dom0, needn''t translate DMA requests through a multi-level page-table. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>

Purchased DQ35JO on Vt-d/PCI passthrough wiki''s recommendations. Built latest xen-unstable and am getting the following via ''xm dmesg'': (XEN) [VT-D]dmar.c:374: RMRR error: base_addr d0000000 end_address cfffffff (XEN) Failed to parse ACPI DMAR. Disabling VT-d. My grub.conf looks like this: kernel /xen.gz vga=mode-0x0317 vtd=1 iommu=1

I try pci pci passthrough with xen 3.3.1 and CentOS 5.2(64bit) on a SUPERMICRO C7X58 board I see the following the error in my boot log. (XEN) [VT-D]dmar.c:372: RMRR is incorrect. This problem is caused by this condition in dmr.c:372. if ( rmrr->base_address >= rmrr->end_address ) { dprintk(XENLOG_ERR VTDPREFIX, "RMRR is incorrect.\n"); return -EFAULT; } As an

I try pci pci passthrough with xen 3.3.1 and CentOS 5.2(64bit) on a SUPERMICRO C7X58 board I see the following the error in my boot log. (XEN) [VT-D]dmar.c:372: RMRR is incorrect. This problem is caused by this condition in dmr.c:372. if ( rmrr->base_address >= rmrr->end_address ) { dprintk(XENLOG_ERR VTDPREFIX, "RMRR is incorrect.\n"); return -EFAULT; } As an

Rather than requiring the scopes to be the first members of their respective structures (so that casts can be used to switch between the different views), properly use types and container_of(). Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -304,13 +304,15 @@ static int __init scope_device_count(con

tmoore wrote: > > > I`ve raised a support case with ASUS to try to get them to fix the BIOS on > P6T Deluxe ... I`ll keep this thread updated. > > The IOMMU is seriously broken on this board, I have tried many workarounds > and it always results in failure. > > > Hello, did you get a reply? Somebody else has something new about the Asus P6T and this problem? How

Setting isa irq mapping in hvm_do_IRQ_dpci() costs time when each interrupt occurs, and it doesn''t update isa irq mapping when pci_link is updated. This patch fixes this issue. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

MSI-x may have multiple vectors, however in current interrupt remapping code, one device only has one entry in interrupt remapping table. This patch adds ''remap_index'' in msi_desc structure to track its index in interrupt remapping table. Signed-off-by: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>

When ir_ctrl->iremap_index == -1, it means there is no remap entry. So it needn''t to convert from remap format to normal ioapic format. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch cleans up iommu code. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

reaver wrote: > > On Tue, Feb 24, 2009 at 12:36 AM, Dustin Henning > <Dustin.Henning@prd-inc.com> wrote: >> Christian, >>        I am not sure what lead me to believe you had an AMD system.  To >> summarize what I was trying to say, ASUS is claiming that this issue is >> unsupported because you use Linux, but at the end of the day, the issue >> has

Currently we assign devices with VT-d in Xend, this raises two issues: 1) assign devices regardless of they are hidden by pciback or not. If the device is not hidden, it results in the device doesn''t work in Dom0; 2) device is assigned one by one, if assign multiple devices, some devices may have been assigned when problem happens, it results in assigned devices don''t work in

The patches are as follows: Patch 1: Map RMRR in intel_iommu_add_device() if the device has RMRR; move domain_context_mapping() to be in front of list_move() in reassign_device_ownership(). Patch 2: There is only one INCLUDE_ALL DMAR unit in system, but no restriction on whether it''s the last unit. Patch 3: Change code style of pci.c file, and add spin_unlock(&pdev->lock) when

Fixes made in version 2: 1) Use PML4[257] for ioremap of PCI mmcfg. As full 16-bit segment support would require 44-bits. Since each slot only has 39-bits, we support 2048 PCI segments for now. This can be easily expanded if deemed necessary in the future. 2) Integrated PCI mmcfg access with existing PCI config interface for x86_64. Use MMCFG interface if offset is greater than 256.