similar to: Hardware Assisted Paging Param and Message

Also, correct a copy&paste error in the documentation. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- This patch has been in the XenServer patch queue for a long time. It is more for debugging purposes than anything else, but is still proving to be valuable for tracking down bugs with HVM paging operations. diff -r 5af4f2ab06f3 -r e6ec5b2b717f

This patch initializes VMCB CR4 and shadow CR4 with 0 when VMCB is being constructed under nested paging mode. It complies with recent reset_to_realmode change in hvmloader. Signed-off-by: Wei Huang (wei.huang2@amd.com <mailto:wei.huang2@amd.com> ) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

hvm_enable() copies the table contents rather than storing the pointer, so there''s no need to keep these tables post-boot. Also constify the return values of the per-vendor initialization functions, making clear that once the per-vendor initialization is complete, the vendor specific tables won''t get modified anymore. Finally, in hvm_enable(), use the returned pointer for all

Hi, Attached patch implements the VMCB cleanbits SVM feature. Upcoming AMD CPUs introduce them and they are basically hints for the CPU which vmcb values can be re-used from the previous VMRUN instruction. Each bit represents a certain set of fields in the VMCB. Setting a bit tells the cpu it can re-use the cached value from the previous VMRUN. Clearing a bit tells the cpu to reload the values

Future AMD SVM supports a new feature called flush by ASID. The idea is to allow CPU to flush TLBs associated with the ASID assigned to guest VM. So hypervisor doesn''t have to reassign a new ASID in order to flush guest''s VCPU. Please review it. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro

I am adding interrupt support for LWP, whose spec is available at http://support.amd.com/us/Processor_TechDocs/43724.pdf. Basically OS can specify an interrupt vector in LWP_CFG MSR; the interrupt will be triggered when event buffer overflows. For HVM guests, I want to re-inject this interrupt back into the guest VM. Here is one idea similar to virtualized PMU: It first registers a special

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

The attached patch fixes the save/restore issue seen with 32bit Windows guest VMs. The root cause is that current Xen doesn''t intercept SYSENTER-related MSRs for 32bit guest VMs. As a result, the guest_sysenter_xxx fields contain incorrect values and shouldn''t be used for save/restore. This patch checks the LMA bit of EFER register in the save/restore code path. Please apply it

I''m trying to get ceph working with decent performance (currently getting kb/second write performance!) and it seems that maybe the Debian wheezy kernel is just a bit too ancient. The 3.8 kernel from experimental works on bare metal, but when booting as dom0 under the xen hypervisor it crashes. I just figured out how to redirect xen output to my IPMI/BMC serial port and I see this:

# HG changeset patch # User Olaf Hering <olaf@aepfle.de> # Date 1333120147 -7200 # Node ID 34d9828185501f6e7ea2c3c2a397176a8e54ef0a # Parent 80653c8ea1d19dfe6130396bbc77f766eb9f9fab xenpaging: add error code to indicate iommem passthrough Similar to the existing ENODEV and EXDEV error codes, add EMDEV to indicate that iommu passthrough is not compatible with paging. All error codes are

Ever since xen-unstable cset 14308 ("pci back: Fix registration of of filters on subsections of config space") I''ve been getting an MCA on the *2nd* boot of a driver domain using an e1000 NIC. Cset 14308 allowed the proper setup of the PM control registers, so the NIC is put in the D3 power state when the driver domain shuts down. Unfortunately, pci_set_power_state()

Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -722,6 +722,10 @@ int paging_domctl(struct domain *d, xen_ /* Call when destroying a domain */ void paging_teardown(struct domain *d) { + /* Make sure log-dirty is turned off before trying to

Dear R-help listers, I am now asking for helps on how to draw stacked ellipses to illustrate the shared and specific of multiple objects using R. My problem comes from my population genetics study. Now, I genotyped three species, and I get known about the amount of shared and specific haplotypes in each of the species and their combinations. I want to illustrate this result in three stack

Hello I have Debian Linux 2.6.32-5-xen-amd64 Xen 4.0.1, 2 SAS drives in RAID 1, 16GB ram. I have virtualized Windows 2003R2 32bit where you install the latest version 0.11.0.295 gplpv After reading and reading forums and post testing, I noticed that the hard disk performance drops significantly when I assign the windows domU 9GB ram. (below I leave the config files) If I run the

This patch worked on top of paging interface patches posted today. It create common interface for P2M table, which handles guest physical address to machine physical address translation. Tested on the following platforms: 1. AMD SVM boxes * 64-bit Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10 PAE BigSMP, and 64-bit RHEL4 * 32-bit PAE Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10

Hello list, Decided to upgrade to the latest xen-unstable today. However the boot always stops at "HVM: Hardware Assisted Paging detected." Attached is a log of the boot process. The latest 4.1 version in mercurial works though (log attached as well), but causes the system to lockup every 10 or so hours (see next email). Any ideas? _______________________________________________

There is a race condition between XEN_DOMCTL_SHADOW_OP_ENABLE_LOGDIRTY and HVMOP_track_dirty_vram hypercall. Although HVMOP_track_dirty_vram is called many times from qemu-dm which is connected via VNC, XEN_DOMCTL_SHADOW_OP_ENABLE_LOGDIRTY is called only once from a migration process (e.g. xc_save, libxl-save-helper). So the race seldom happens, but the following cases are possible.

This patch series includes a series of bugs related to p2m, ept, and PoD code which were found as part of our XenServer product testing. Each of these fixes actual bugs, and the 3.4-based version of the patch has been tested thoroughly. (There may be bugs in porting the patches, but most of them are simple enough as to make it unlikely.) Each patch is conceptually independent, so they can each

Hi, I have hybrid smp running with autoxlate. However, without autoxlate, I am running into issues realted to TLB flush. The guest in this case makes multicalls as part of which cache is flushed (__do_update_va_mapping, etc..). However, the guest is using VPIDs and it is getting complicated. I can just xen not do any TLB management and let the guest just do it after return from the hypercall.

This patch implements flush by asid feature for AMD CPUs. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd