similar to: BUG: unable to handle kernel paging request at virtual address c0f5672c

Displaying 20 results from an estimated 4000 matches similar to: "BUG: unable to handle kernel paging request at virtual address c0f5672c"

2008 Apr 06
3
Xen 3.2.1-rc1: ptwr_emulate: could not get_page_from_l1e()
Xen 3.2.1-rc1 64 bit Dom0: 2.6.16.33 PAE DomU: 2.6.18.8 (from a pull a few weeks ago) If you need the symbols, there from the same Xen I linked to in my post from a few days ago... (XEN) mm.c:3498:d4 ptwr_emulate: could not get_page_from_l1e() (XEN) Unhandled page fault in domain 4 on VCPU 0 (ec=0003) (XEN) Pagetable walk from 00000000c08187f0: (XEN) L4[0x000] = 00000004dfa38027
2009 Dec 20
0
xen domu not starting
After running out of swap and memory and freezing, a domU called web02 won't start up. Both dom0 and domU are running CentOS release 5.4. dom0's kernel is 2.6.18-164.el5xen and I'm running the stock xen from CentOS: xen-3.0.3-94.el5 After issuing 'xen create web02' I see the following in the xen console: Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) vmalloc
2007 Oct 03
0
[PATCH 3/3] TLB flushing and IO memory mapping
Signed-off-by: Kieran Mansley <kmansley@solarflare.com> Allow iomem permissions to be set up through grant table ops diff -r 749b60ccc177 xen/arch/x86/mm.c --- a/xen/arch/x86/mm.c Wed Jul 25 14:03:08 2007 +0100 +++ b/xen/arch/x86/mm.c Wed Jul 25 14:03:12 2007 +0100 @@ -594,6 +594,14 @@ get_##level##_linear_pagetable( return 1; \ } + +int iomem_page_test(unsigned long mfn,
2011 Sep 01
0
[PATCH 3/5] resample: Add NEON optimized inner_product_single for fixed point
From: Jyri Sarha <jsarha at ti.com> Semantics of inner_product_single have also been changed to contain the final right shift and saturation so it can also be implemented in the optimal way for the used platform. This change affects fixed point calculations only. I also added a new fixed point macro SATURATE32PSHR(x, shift, a). It does pretty much the same thing as SATURATE32(PSHR32(x,
2007 May 14
0
[PATCH] x86: ptwr adjustments
Make sure MFN read from pte is valid before accessing the page info structure associated with it. Drop guest-to-machine-physical translation from ptwr code. Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: 2007-05-14/xen/arch/x86/mm.c =================================================================== --- 2007-05-14.orig/xen/arch/x86/mm.c 2007-05-14 13:43:50.000000000 +0200 +++
2010 Jul 05
2
nested for loops
Dear Admin, I will appreciate if you advise me an effective way to write the following R code including nested for loops. I cannot do it by using expand.grid function because it results with memory allocation problems. Thanks for your time and consideration. for(d1 in 0:n){ for(d2 in 0:n){ for(d3 in 0:n){ for(d4 in 0:n){ for(d5 in 0:n){ for(d6 in 0:n){ for(d7 in 0:n){ for(d8 in 0:n){ for(d9 in
2008 Oct 17
4
Vista Ultimate 32-bit install - VNC woes
Hi, I''m running Xen server based on OpenSuSE 11 (Xen version 3.2.1_16881_04-4.2). I have several Linux DomU''s that run perfect. Now I need a temporary Vista install (for testing) so I used ''virt-manager'' to install Vista. I used LVM based setup, Vista got 4GB of memory (at least temporary) and 2 CPU''s. Initially things look good - I get the console
2007 May 23
0
Apache CGI Performance Big Degration in Dom0 vs. Native
Hi there, I ran a test on an Apache server, the workload is a helloworld.c compiled cgi, very simple. OS is SLES 10. The stress tool is ab (apache bench). The performance looks big degration from native to Dom0: Running in prefork mode: Native Dom0 Performance(request/s) 3700 . 650 CPU%
2007 May 23
0
Apache CGI Performance Big Degration in Dom0 vs. Native
Hi there, I ran a test on an Apache server, the workload is a helloworld.c compiled cgi, very simple. OS is SLES 10. The stress tool is ab (apache bench). The performance looks big degration from native to Dom0: Running in prefork mode: Native Dom0 Performance(request/s) 3700 . 650 CPU%
2012 Jul 05
0
[LLVMdev] RE : Vector argument passing abi for ARM ?
Hi Sebastien, > I also thought it was a bug, especially since it worked with LLVM 3.0, but since it is not defined by ABI, I was not sure if I need to submit it as a BUG. yes it is a bug. > I wanted to be sure that it is an actual BUG before submitting it and got the not-a-bug answer. I didn't read Nadav's reply as saying there was no bug, in fact he explicitly said in his email
2011 Nov 01
2
xenpaing: one way to avoid paging out the page, when the corresponding mfn is in use.
Hello, Recently many advanced memory mechanisms are introduced into Xen. One problem we found is the conflict between p2m query and setting. For example, backend drivers always map domU’s page to its own space, during the mapping procedure, situations as follow may happen, when mfn is obtained by gfn_to_mfn(), this mfn is likely to be paged out. first case: grant mapping
2012 Jul 05
2
[LLVMdev] RE : Vector argument passing abi for ARM ?
Hi Duncan, I also thought it was a bug, especially since it worked with LLVM 3.0, but since it is not defined by ABI, I was not sure if I need to submit it as a BUG. I wanted to be sure that it is an actual BUG before submitting it and got the not-a-bug answer. Here is a small example to reproduce the problem I'm experiencing: ; ModuleID = 'bugparam.ll' target datalayout =
2018 Dec 03
0
Positions at GMI, Dublin, Ireland
Dear mailing list, Genomics Medicine Ireland is opening new positions for our bioinformatics team. The team will analyse the ?omics data produced at GMI, which currently includes disease cohorts such as IBD, Multiple sclerosis, Alzheimer's, rare diseases, cancer and recently we have opened programs in diabetes and asthma. Our work will also focus on ancestry related topics, namely how
2012 Feb 14
1
[PATCH] x86: don't allow Dom0 to map MSI-X table writably
With the traditional qemu tree fixed to not use PROT_WRITE anymore in the mmap() call for this region, and with the upstream qemu tree not being capable of handling passthrough, yet, there''s no need to treat Dom specially here anymore. This continues to leave unaddressed the case where PV guests map the MSI-X table page(s) before setting up the first MSI-X interrupt (see the original c/s
2014 Dec 07
3
[LLVMdev] NEON intrinsics preventing redundant load optimization?
Hi all, I’m not sure if this is the right list, so apologies if not. Doing some profiling I noticed some of my hand-tuned matrix multiply code with NEON intrinsics was much slower through a C++ template wrapper vs calling the intrinsics function directly. It turned out clang/LLVM was unable to eliminate a temporary even though the case seemed quite straightforward. Unfortunately any loads
2010 Aug 13
0
instrction emulation problem
Hi Keir: I am sorry trouble you again. I want to emulate instruction "push %ebp" in Xen. I found the function emulate_privilege_op does not satisfy this requirement. Then I resort to x86_emulate. I construct the x86_emulate_ctxt and reuse the "ptwr_emulate_ops". code like this: extern const struct x86_emulate_ops ptwr_emulate_ops; in do_general_protection { .... struct
2006 Oct 04
4
Can''t set break points with Linux guest in PAE mode
Folks -- One more time with the PAE request, this time I''ve brought up the Linux kernel w/ a very recent version of Xen. (Just yesterday I pulled and updated my hg tree.) I still can''t set breakpoints within the guest domain: # gdb vmlinux GNU gdb 6.4-debian <...> (gdb) target remote roti.lab.netapp.com:9999 Remote debugging using roti.lab.netapp.com:9999 [New
2012 Sep 21
2
[LLVMdev] RE : Question about LLVM NEON intrinsics
Hello Renato, You're pointing me at ARM intrinsics related to loads, problem that I've reported in original e-mail, is not support for vector loads, but support for 'vmaxs'. For instance, there is no vector loads of 16 floats in ARM ISA but it is legal to write in LLVM: ; ModuleID = 'vadd.ll' target datalayout =
2011 Jun 09
1
Error: missing values where TRUE/FALSE needed
I'm writing a function and keep getting the following error message. myfunc <- function(lst) { lst <- list(roots = c("car insurance", "auto insurance"), roots2 = c("insurance"), prefix = c("cheap", "budget"), prefix2 = c("low cost"), suffix = c("quote", "quotes"), suffix2 = c("rate",
2013 Oct 16
3
[LLVMdev] MI scheduler produce badly code with inline function
Hi Andy, thanks for your help!! The scheduled code by method A is same as B when using the new machine model. it's make sense, but there is the another problem, the scheduled code is badly. load/store instruction always reuse the same register Source: #define N 2000000 static double b[N], c[N]; void Scale () { double scalar = 3.0; for (int j=0;j<N;j++) b[j] =