similar to: [PATCH 1/12] gdt-tss-redundant

From: Joerg Roedel <jroedel at suse.de> Set up the TSS for starting APs before they are kicked. This allows the APs to use IST in early exception handling. Also load the TSS early if the TSS entry in the GDT is present. This makes sure a TSS is only loaded when it has been set up. Signed-off-by: Joerg Roedel <jroedel at suse.de> Link:

From: Joerg Roedel <jroedel at suse.de> The IDT on 64bit contains vectors which use paranoid_entry() and/or IST stacks. To make these vectors work the TSS and the getcpu GDT entry need to be set up before the IDT is loaded. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/include/asm/processor.h | 1 + arch/x86/kernel/cpu/common.c | 23 +++++++++++++++++++++++

On Mon, Sep 07, 2020 at 03:16:08PM +0200, Joerg Roedel wrote: > From: Joerg Roedel <jroedel at suse.de> > > The IDT on 64bit contains vectors which use paranoid_entry() and/or IST > stacks. To make these vectors work the TSS and the getcpu GDT entry need > to be set up before the IDT is loaded. > > Signed-off-by: Joerg Roedel <jroedel at suse.de> > --- >

From: Joerg Roedel <jroedel at suse.de> The #VC exception will trigger very early in head_64.S, when the first CPUID instruction is executed. When secondary CPUs boot, they already load the real system IDT, which has the #VC handler configured to be using an IST stack. IST stacks require a TSS to be loaded, to set up the TSS early for bringing up the secondary CPUs. Use the RW version of

__set_tss_desc has a complex calculation of the TSS segment limit, duplicating the quirky details of the I/O bitmap array length, and requiring a complex comment to explain. Replace that calculation with a simpler one based on the offsetof the "stack" field that follows the array. That then removes the last use of IO_BITMAP_OFFSET, so delete it. Signed-off-by: Josh Triplett <josh

On 10/30/2013 03:22 PM, Kees Cook wrote: >> >> - /* >> - * sizeof(unsigned long) coming from an extra "long" at the end >> - * of the iobitmap. See tss_struct definition in processor.h >> - * >> - * -1? seg base+limit should be pointing to the address of the >> - * last valid byte > > I think it

__set_tss_desc has a complex calculation of the TSS segment limit, duplicating the quirky details of the I/O bitmap array length, and requiring a complex comment to explain. Replace that calculation with a simpler one based on the offsetof the "stack" field that follows the array. That then removes the last use of IO_BITMAP_OFFSET, so delete it. Signed-off-by: Josh Triplett <josh

Hi Josh, On Tue, Oct 22, 2013, at 3:34, Josh Triplett wrote: > __set_tss_desc has a complex calculation of the TSS segment limit, > duplicating the quirky details of the I/O bitmap array length, and > requiring a complex comment to explain. Replace that calculation with a > simpler one based on the offsetof the "stack" field that follows the > array. > > That then

Hi Josh, On Tue, Oct 22, 2013, at 3:34, Josh Triplett wrote: > __set_tss_desc has a complex calculation of the TSS segment limit, > duplicating the quirky details of the I/O bitmap array length, and > requiring a complex comment to explain. Replace that calculation with a > simpler one based on the offsetof the "stack" field that follows the > array. > > That then

On Mon, Oct 21, 2013 at 7:34 PM, Josh Triplett <josh at joshtriplett.org> wrote: > __set_tss_desc has a complex calculation of the TSS segment limit, > duplicating the quirky details of the I/O bitmap array length, and > requiring a complex comment to explain. Replace that calculation with a > simpler one based on the offsetof the "stack" field that follows the >

On Mon, Oct 21, 2013 at 7:34 PM, Josh Triplett <josh at joshtriplett.org> wrote: > __set_tss_desc has a complex calculation of the TSS segment limit, > duplicating the quirky details of the I/O bitmap array length, and > requiring a complex comment to explain. Replace that calculation with a > simpler one based on the offsetof the "stack" field that follows the >

Use an early clobber on addr to avoid the extra rorl instruction at the end of _set_tssldt_desc. Also, get some C type checking on the descriptor struct here. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== --- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08

Use an early clobber on addr to avoid the extra rorl instruction at the end of _set_tssldt_desc. Also, get some C type checking on the descriptor struct here. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== --- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08

Hello, Is anyone aware of a good tutorial which will help me: 1) install icecast 2) config it 3) connect a TSS source 4) connect a VLC client(s) 5) stream video source to client. I know this probably seems overly basic, however I have been trying to get this running for a few days and have been having a number of problems configing icecast, and am not finding the information provided in the

Descriptor and trap table cleanups. Add cleanly written accessors for IDT and GDT gates so the subarch may override them. Note that this allows the hypervisor to transparently tweak the DPL of the descriptors as well as the RPL of segments in those descriptors, with no unnecessary kernel code modification. It also allows the hypervisor implementation of the VMI to tweak the gates, allowing for

Descriptor and trap table cleanups. Add cleanly written accessors for IDT and GDT gates so the subarch may override them. Note that this allows the hypervisor to transparently tweak the DPL of the descriptors as well as the RPL of segments in those descriptors, with no unnecessary kernel code modification. It also allows the hypervisor implementation of the VMI to tweak the gates, allowing for

i386 Transparent paravirtualization subarch patch #5 This change encapsulates descriptor and task register management. Diffs against: 2.6.13-rc4-mm1 Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== --- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08 17:31:59.000000000 -0700

i386 Transparent paravirtualization subarch patch #5 This change encapsulates descriptor and task register management. Diffs against: 2.6.13-rc4-mm1 Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== --- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08 17:31:59.000000000 -0700

Use an early clobber on addr to avoid the extra rorl instruction at the end of _set_tssldt_desc. Also, get some C type checking on the descriptor struct here. Patch-base: 2.6.13-rc5-mm1 Patch-keys: i386 desc cleanup optimize Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== ---

Use an early clobber on addr to avoid the extra rorl instruction at the end of _set_tssldt_desc. Also, get some C type checking on the descriptor struct here. Patch-base: 2.6.13-rc5-mm1 Patch-keys: i386 desc cleanup optimize Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== ---