Displaying 20 results from an estimated 800 matches similar to: "[PATCH 10/21] i386 Use protected segment for 16bit stack"
2007 Apr 18
0
[PATCH 7/12] gdt-accessor
Index: linux-2.6.13/include/asm-i386/desc.h
===================================================================
--- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08 17:15:56.000000000 -0700
+++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:16:07.000000000 -0700
@@ -21,6 +21,8 @@
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
DECLARE_PER_CPU(struct desc_struct,
2007 Apr 18
0
[PATCH 7/12] gdt-accessor
Index: linux-2.6.13/include/asm-i386/desc.h
===================================================================
--- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08 17:15:56.000000000 -0700
+++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:16:07.000000000 -0700
@@ -21,6 +21,8 @@
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
DECLARE_PER_CPU(struct desc_struct,
2007 Apr 18
1
[PATCH 2/3] Gdt_accessor
Add an accessor function for getting the per-CPU gdt. Callee must already
have the CPU.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.14-rc1/include/asm-i386/desc.h
===================================================================
--- linux-2.6.14-rc1.orig/include/asm-i386/desc.h 2005-09-20 14:49:10.000000000 -0700
+++ linux-2.6.14-rc1/include/asm-i386/desc.h
2007 Apr 18
1
[PATCH 2/3] Gdt_accessor
Add an accessor function for getting the per-CPU gdt. Callee must already
have the CPU.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.14-rc1/include/asm-i386/desc.h
===================================================================
--- linux-2.6.14-rc1.orig/include/asm-i386/desc.h 2005-09-20 14:49:10.000000000 -0700
+++ linux-2.6.14-rc1/include/asm-i386/desc.h
2007 Apr 18
2
[PATCH 8/14] i386 / Add a per cpu gdt accessor
Add an accessor function for getting the per-CPU gdt. Callee must already
have the CPU.
Patch-base: 2.6.13-rc5-mm1
Patch-keys: i386 desc xen
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/include/asm-i386/desc.h
===================================================================
--- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-09 20:17:21.000000000 -0700
+++
2007 Apr 18
2
[PATCH 8/14] i386 / Add a per cpu gdt accessor
Add an accessor function for getting the per-CPU gdt. Callee must already
have the CPU.
Patch-base: 2.6.13-rc5-mm1
Patch-keys: i386 desc xen
Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/include/asm-i386/desc.h
===================================================================
--- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-09 20:17:21.000000000 -0700
+++
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
Ancient inline assembler that manipulates descriptor tables is unreadable
and has no type checking. Doing this in C actually generates better code,
saves code space, and improves readability.
The fact that you must cast descriptors to (char *) for the inline assembler
to work properly caused me no end of grief working on these patches.
Note that GCC does not generate rotations to utilize
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
Ancient inline assembler that manipulates descriptor tables is unreadable
and has no type checking. Doing this in C actually generates better code,
saves code space, and improves readability.
The fact that you must cast descriptors to (char *) for the inline assembler
to work properly caused me no end of grief working on these patches.
Note that GCC does not generate rotations to utilize
2007 Apr 18
2
[PATCH 4/21] i386 Broken bios common
Both the APM BIOS and PnP BIOS code use a segment hack to simulate real
mode selector 0x40 (which points to the BIOS data area at 0x00400 in
real mode). Several broken BIOSen use selector 0x40 as if they were
running in real mode, which we make work by faking up selector 0x40 in
the GDT to point to physical memory starting at 0x400. We limit the
access to the remainder of this physical page
2007 Apr 18
2
[PATCH 4/21] i386 Broken bios common
Both the APM BIOS and PnP BIOS code use a segment hack to simulate real
mode selector 0x40 (which points to the BIOS data area at 0x00400 in
real mode). Several broken BIOSen use selector 0x40 as if they were
running in real mode, which we make work by faking up selector 0x40 in
the GDT to point to physical memory starting at 0x400. We limit the
access to the remainder of this physical page
2007 Apr 18
1
[PATCH 0/7] Using %gs for per-cpu areas on x86
OK, here it is. Benchmarks still coming. This is against Andi's
2.6.18-rc7-git3 tree, and replaces the patches between (and not
including) i386-pda-asm-offsets and i386-early-fault.
One patch is identical, one is mildly modified, the rest are
re-implemented but inspired by Jeremy's PDA work.
Thanks,
Rusty.
--
Help! Save Australia from the worst of the DMCA: http://linux.org.au/law
2007 Apr 18
1
[PATCH 0/7] Using %gs for per-cpu areas on x86
OK, here it is. Benchmarks still coming. This is against Andi's
2.6.18-rc7-git3 tree, and replaces the patches between (and not
including) i386-pda-asm-offsets and i386-early-fault.
One patch is identical, one is mildly modified, the rest are
re-implemented but inspired by Jeremy's PDA work.
Thanks,
Rusty.
--
Help! Save Australia from the worst of the DMCA: http://linux.org.au/law
2007 Apr 18
3
Per-cpu patches on top of PDA stuff...
Hi Jeremy, all,
Sorry this took so long, spent last week in Japan at OSDL conf then
netconf. After several false starts, I ended up with a very simple
implementation, which clashes significantly with your work since then
8(. I've pushed the patches anyway, but it's going to be significant
work for me to re-merge them, so I wanted your feedback first.
The first patch simply changes
2007 Apr 18
3
Per-cpu patches on top of PDA stuff...
Hi Jeremy, all,
Sorry this took so long, spent last week in Japan at OSDL conf then
netconf. After several false starts, I ended up with a very simple
implementation, which clashes significantly with your work since then
8(. I've pushed the patches anyway, but it's going to be significant
work for me to re-merge them, so I wanted your feedback first.
The first patch simply changes
2007 Apr 18
2
[PATCH 3/3] Gdt page isolation
Make GDT page aligned and page padded to support running inside of a
hypervisor. This prevents false sharing of the GDT page with other
hot data, which is not allowed in Xen, and causes performance problems
in VMware.
Rather than go back to the old method of statically allocating the
GDT (which wastes unneded space for non-present CPUs), the GDT for
APs is allocated dynamically.
Signed-off-by:
2007 Apr 18
2
[PATCH 3/3] Gdt page isolation
Make GDT page aligned and page padded to support running inside of a
hypervisor. This prevents false sharing of the GDT page with other
hot data, which is not allowed in Xen, and causes performance problems
in VMware.
Rather than go back to the old method of statically allocating the
GDT (which wastes unneded space for non-present CPUs), the GDT for
APs is allocated dynamically.
Signed-off-by:
2007 Apr 18
0
[PATCH 13/21] i386 Gdt page isolation
Make GDT page aligned and page padded to support running inside of a
hypervisor. This prevents false sharing of the GDT page with other
hot data, which is not allowed in Xen, and causes performance problems
in VMware.
Rather than go back to the old method of statically allocating the
GDT (which wastes unneded space for non-present CPUs), the GDT for
APs is allocated dynamically.
Signed-off-by:
2007 Apr 18
0
[PATCH 13/21] i386 Gdt page isolation
Make GDT page aligned and page padded to support running inside of a
hypervisor. This prevents false sharing of the GDT page with other
hot data, which is not allowed in Xen, and causes performance problems
in VMware.
Rather than go back to the old method of statically allocating the
GDT (which wastes unneded space for non-present CPUs), the GDT for
APs is allocated dynamically.
Signed-off-by:
2012 Jun 29
0
[PATCH] linux-2.6.18/x86: improve CR0 read/write handling
With the only bit in CR0 permitted to be changed by PV guests being TS,
optimize the handling towards that: Keep a cached value in a per-CPU
variable, and issue HYPERVISOR_fpu_taskswitch hypercalls for updates in
all but the unusual case should something in the system still try to
modify another bit (the attempt of which would then be logged by the
hypervisor).
This removes the need to have the
2007 Apr 18
0
[PATCH 8/21] i386 Segment protect properly
It is impossible to have a zero length segment in descriptor tables using
"normal" segments. One of many ways to properly protect segments to zero
length is to map the base to an umapped page. Create a nicer way to do
this, and stop subtracting 1 from the length passed to set_limit (note
calling set limit with a zero limit does something very bad! - not anymore).
Signed-off-by: