similar to: [RFC PATCH 31/35] Add Xen grant table support

The kmap_atomic* interfaces in all architectures are pretty much the same except for post map operations (flush) and pre- and post unmap operations. Provide a generic variant for that. Signed-off-by: Thomas Gleixner <tglx at linutronix.de> Cc: Andrew Morton <akpm at linux-foundation.org> Cc: linux-mm at kvack.org --- V3: Do not reuse the kmap_atomic_idx pile and use kmap_size.h right

Instead of storing the map per CPU provide and use per task storage. That prepares for local kmaps which are preemptible. The context switch code is preparatory and not yet in use because kmap_atomic() runs with preemption disabled. Will be made usable in the next step. The context switch logic is safe even when an interrupt happens after clearing or before restoring the kmaps. The kmap index in

If we're building a pte, we can use simple assigment; only use set_pte etc. when we're actually going to use that destination as a PTE. I don't know that we'll ever run under Xen, but it's neater. And use set_pte/set_pmd rather than assuming native_ versions, even though that's probably true for most people. (Includes compile fix by Kamalesh Babulal <kamalesh at

If we're building a pte, we can use simple assigment; only use set_pte etc. when we're actually going to use that destination as a PTE. I don't know that we'll ever run under Xen, but it's neater. And use set_pte/set_pmd rather than assuming native_ versions, even though that's probably true for most people. (Includes compile fix by Kamalesh Babulal <kamalesh at

No reason having the same code in every architecture Signed-off-by: Thomas Gleixner <tglx at linutronix.de> Cc: Thomas Bogendoerfer <tsbogend at alpha.franken.de> Cc: linux-mips at vger.kernel.org --- V3: Remove the kmap types cruft --- arch/mips/Kconfig | 1 arch/mips/include/asm/fixmap.h | 4 - arch/mips/include/asm/highmem.h | 6 +-

This highly technical change allows the kernel to jump atop the Eiffel Tower, fly with acceleration fifty times that of a space shuttle, and ingest 15 times its own weight. Patch-subject: Whitespace cleanup in pageattr.c Depends-on: add-pgtable-allocation-notifiers Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/arch/i386/mm/pageattr.c

This highly technical change allows the kernel to jump atop the Eiffel Tower, fly with acceleration fifty times that of a space shuttle, and ingest 15 times its own weight. Patch-subject: Whitespace cleanup in pageattr.c Depends-on: add-pgtable-allocation-notifiers Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.13/arch/i386/mm/pageattr.c

While, as discussed, the performance impact of this option is certainly higher than on native Linux, the option should not be entirely disallowed if people want to sacrifice performance for less lowmem pressure. Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: sle10-sp1-2007-01-10/arch/i386/Kconfig =================================================================== ---

From: Martin Schwidefsky <schwidefsky@de.ibm.com> From: Hubertus Franke <frankeh@watson.ibm.com> From: Himanshu Raj <rhim@cc.gatech.edu> [patch 6/9] Guest page hinting: writable page table entries. The volatile state for page cache and swap cache pages requires that the host system needs to be able to determine if a volatile page is dirty before removing it. This excludes

From: Martin Schwidefsky <schwidefsky@de.ibm.com> From: Hubertus Franke <frankeh@watson.ibm.com> From: Himanshu Raj <rhim@cc.gatech.edu> [patch 6/9] Guest page hinting: writable page table entries. The volatile state for page cache and swap cache pages requires that the host system needs to be able to determine if a volatile page is dirty before removing it. This excludes

plain text document attachment (xx-paravirt-mm.patch) Memory management for paravirt_ops. Signed-off-by: Steven Rostedt srostedt@redhat.com Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Index: clean-start/arch/x86_64/mm/fault.c =================================================================== --- clean-start.orig/arch/x86_64/mm/fault.c +++

plain text document attachment (xx-paravirt-mm.patch) Memory management for paravirt_ops. Signed-off-by: Steven Rostedt srostedt@redhat.com Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Index: clean-start/arch/x86_64/mm/fault.c =================================================================== --- clean-start.orig/arch/x86_64/mm/fault.c +++

Implement lazy MMU update hooks which are SMP safe for both direct and shadow page tables. The idea is that PTE updates and page invalidations while in lazy mode can be batched into a single hypercall. We use this in VMI for shadow page table synchronization, and it is a win. It also can be used by PPC and for direct page tables on Xen. For SMP, the enter / leave must happen under protection

diff -r f1dd818c2f06 include/asm-i386/pgtable-2level.h --- a/include/asm-i386/pgtable-2level.h Thu Oct 19 03:03:09 2006 -0700 +++ b/include/asm-i386/pgtable-2level.h Thu Oct 19 03:03:18 2006 -0700 @@ -22,8 +22,7 @@ #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) -#define

diff -r f1dd818c2f06 include/asm-i386/pgtable-2level.h --- a/include/asm-i386/pgtable-2level.h Thu Oct 19 03:03:09 2006 -0700 +++ b/include/asm-i386/pgtable-2level.h Thu Oct 19 03:03:18 2006 -0700 @@ -22,8 +22,7 @@ #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) -#define

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We want to clone the root for non-PAE mode while it is protected under the pgd lock. Signed-off-by: Zachary Amsden <zach@vmware.com> =================================================================== --- a/arch/i386/kernel/paravirt.c +++

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We want to clone the root for non-PAE mode while it is protected under the pgd lock. Signed-off-by: Zachary Amsden <zach@vmware.com> =================================================================== --- a/arch/i386/kernel/paravirt.c +++

Create a new PTE function which combines clearing a kernel PTE with the subsequent flush. This allows the two to be easily combined into a single hypercall or paravirt-op. More subtly, reverse the order of the flush for kmap_atomic. Instead of flushing on establishing a mapping, flush on clearing a mapping. This eliminates the possibility of leaving stale kmap entries which may still have

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We need to clone the root for non-PAE mode while it is protected under the pgd lock to correctly copy the shadow. We don't need to allocate pgds in PAE mode, (PDPs in Intel terminology) as they only have 4 entries, and are cached entirely by the

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We need to clone the root for non-PAE mode while it is protected under the pgd lock to correctly copy the shadow. We don't need to allocate pgds in PAE mode, (PDPs in Intel terminology) as they only have 4 entries, and are cached entirely by the