similar to: [RFC, PATCH 19/24] i386 Vmi mmu changes

The ptep_establish macro is only used on user-level PTEs, for P->P mapping changes. Since these always happen under protection of the pagetable lock, the strong synchronization of a 64-bit cmpxchg is not needed, in fact, not even a lock prefix needs to be used. We can simply instead clear the P-bit, followed by a normal set. The write ordering is still important to avoid the possibility of

Now that ptep_establish has a definition in PAE i386 3-level paging code, the only paging model which is insane enough to have multi-word hardware PTEs which are not efficient to set atomically, we can remove the ghost of set_pte_atomic from other architectures which falesly duplicated it, and remove all knowledge of it from the generic pgtable code. set_pte_atomic is now a private pte operator

Here's a first attempt at splitting up paravirt_ops into more specific chunks. Its pretty clunky and chunky; mostly just a lot of replacement. The grouping of ops is very first cut; I'm open to suggestions about what groups should exist and what ops they each should contain. The only slightly subtle part is that I've kept the structures wrapped in a paravirt_ops structure,

Here's a first attempt at splitting up paravirt_ops into more specific chunks. Its pretty clunky and chunky; mostly just a lot of replacement. The grouping of ops is very first cut; I'm open to suggestions about what groups should exist and what ops they each should contain. The only slightly subtle part is that I've kept the structures wrapped in a paravirt_ops structure,

[ I think this is a straight repost this patch, which addresses all the previous comments. I'd like to submit this for .24 as the basis for a unified paravirt_ops. Any objections? ] This patch refactors the paravirt_ops structure into groups of functionally related ops: pv_info - random info, rather than function entrypoints pv_init_ops - functions used at boot time (some for module_init

[ I think this is a straight repost this patch, which addresses all the previous comments. I'd like to submit this for .24 as the basis for a unified paravirt_ops. Any objections? ] This patch refactors the paravirt_ops structure into groups of functionally related ops: pv_info - random info, rather than function entrypoints pv_init_ops - functions used at boot time (some for module_init

This patch refactors the paravirt_ops structure into groups of functionally related ops: pv_info - random info, rather than function entrypoints pv_init_ops - functions used at boot time (some for module_init too) pv_misc_ops - lazy mode, which didn't fit well anywhere else pv_time_ops - time-related functions pv_cpu_ops - various privileged instruction ops pv_irq_ops - operations for

This patch refactors the paravirt_ops structure into groups of functionally related ops: pv_info - random info, rather than function entrypoints pv_init_ops - functions used at boot time (some for module_init too) pv_misc_ops - lazy mode, which didn't fit well anywhere else pv_time_ops - time-related functions pv_cpu_ops - various privileged instruction ops pv_irq_ops - operations for

Add a pte_update_hook which notifies about pte changes that have been made without using the set_pte / clear_pte interfaces. This allows shadow mode hypervisors which do not trap on page table access to maintain synchronized shadows. It also turns out, there was one pte update in PAE mode that wasn't using any accessor interface at all for setting NX protection. Considering it is PAE

Add 5-argument handling for paravirt ops patching of PAE functions. Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r dbe11208916f include/asm-i386/paravirt.h --- a/include/asm-i386/paravirt.h Thu Apr 19 11:40:55 2007 -0700 +++ b/include/asm-i386/paravirt.h Thu Apr 19 12:04:16 2007 -0700 @@ -308,10 +308,9 @@ unsigned paravirt_patch_insns(void *site * return value handling from

Add 5-argument handling for paravirt ops patching of PAE functions. Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r dbe11208916f include/asm-i386/paravirt.h --- a/include/asm-i386/paravirt.h Thu Apr 19 11:40:55 2007 -0700 +++ b/include/asm-i386/paravirt.h Thu Apr 19 12:04:16 2007 -0700 @@ -308,10 +308,9 @@ unsigned paravirt_patch_insns(void *site * return value handling from

Impact: intermittent guest segv/crash fix I've been seeing random guest bad address crashes and segmentation faults: bisect led to 4f98a2fee8 (vmscan: split LRU lists into anon & file sets), but that's a red herring. It turns out that lguest never hooked up the pte_update/pte_update_defer calls, so our ptes were not always in sync. After the vmscan commit, the bug became

Impact: intermittent guest segv/crash fix I've been seeing random guest bad address crashes and segmentation faults: bisect led to 4f98a2fee8 (vmscan: split LRU lists into anon & file sets), but that's a red herring. It turns out that lguest never hooked up the pte_update/pte_update_defer calls, so our ptes were not always in sync. After the vmscan commit, the bug became

On x86 set_pte_at() is now always falling back to set_pte(). So instead of having this fallback after the paravirt maze just drop the set_pte_at paravirt operation and let set_pte_at() use the set_pte() function directly. Signed-off-by: Juergen Gross <jgross at suse.com> --- arch/x86/include/asm/paravirt.h | 8 +------- arch/x86/include/asm/paravirt_types.h | 2 --

Hi, this version requires that host and guest have the same PAE status. NX cap is not offered to the guest, yet. Thanks, Matias Lguest PAE support Signed-off-by: Matias Zabaljauregui <zabaljauregui at gmail.com> --- Documentation/lguest/lguest.txt | 1 - arch/x86/include/asm/lguest.h | 7 +- arch/x86/include/asm/lguest_hcall.h | 3 +- arch/x86/lguest/Kconfig

Hi, this version requires that host and guest have the same PAE status. NX cap is not offered to the guest, yet. Thanks, Matias Lguest PAE support Signed-off-by: Matias Zabaljauregui <zabaljauregui at gmail.com> --- Documentation/lguest/lguest.txt | 1 - arch/x86/include/asm/lguest.h | 7 +- arch/x86/include/asm/lguest_hcall.h | 3 +- arch/x86/lguest/Kconfig

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We want to clone the root for non-PAE mode while it is protected under the pgd lock. Signed-off-by: Zachary Amsden <zach@vmware.com> =================================================================== --- a/arch/i386/kernel/paravirt.c +++

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We want to clone the root for non-PAE mode while it is protected under the pgd lock. Signed-off-by: Zachary Amsden <zach@vmware.com> =================================================================== --- a/arch/i386/kernel/paravirt.c +++

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We need to clone the root for non-PAE mode while it is protected under the pgd lock to correctly copy the shadow. We don't need to allocate pgds in PAE mode, (PDPs in Intel terminology) as they only have 4 entries, and are cached entirely by the

The VMI backend uses explicit page type notification to track shadow page tables. The allocation of page table roots is especially tricky. We need to clone the root for non-PAE mode while it is protected under the pgd lock to correctly copy the shadow. We don't need to allocate pgds in PAE mode, (PDPs in Intel terminology) as they only have 4 entries, and are cached entirely by the