similar to: [RFC, PATCH 15/24] i386 Vmi apic header

Use para_fill instead of directly setting the APIC ops to the result of the vmi_get_function call - this allows one to implement a VMI ROM without implementing APIC functions, just using the native APIC functions. While doing this, I realized that there is a lot more cleanup that should have been done. Basically, we should never assume that the ROM implements a specific set of functions, and

Use para_fill instead of directly setting the APIC ops to the result of the vmi_get_function call - this allows one to implement a VMI ROM without implementing APIC functions, just using the native APIC functions. While doing this, I realized that there is a lot more cleanup that should have been done. Basically, we should never assume that the ROM implements a specific set of functions, and

plain text document attachment (xx-paravirt-apic-header.patch) This patch updates the apic header file for switching apic_read and write for use with paravirt ops. Signed-off-by: Steven Rostedt srostedt@redhat.com Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Index: clean-start/include/asm-x86_64/apic.h =================================================================== ---

plain text document attachment (xx-paravirt-apic-header.patch) This patch updates the apic header file for switching apic_read and write for use with paravirt ops. Signed-off-by: Steven Rostedt srostedt@redhat.com Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Index: clean-start/include/asm-x86_64/apic.h =================================================================== ---

VMI timer code. It works by taking over the local APIC clock when APIC is configured, which requires a couple hooks into the APIC code. The backend timer code could be commonized into the timer infrastructure, but there are some pieces missing (stolen time, in particular), and the exact semantics of when to do accounting for NO_IDLE need to be shared between different hypervisors as well. So

VMI timer code. It works by taking over the local APIC clock when APIC is configured, which requires a couple hooks into the APIC code. The backend timer code could be commonized into the timer infrastructure, but there are some pieces missing (stolen time, in particular), and the exact semantics of when to do accounting for NO_IDLE need to be shared between different hypervisors as well. So

VMI timer code. It works by taking over the local APIC clock when APIC is configured, which requires a couple hooks into the APIC code. The backend timer code could be commonized into the timer infrastructure, but there are some pieces missing (stolen time, in particular), and the exact semantics of when to do accounting for NO_IDLE need to be shared between different hypervisors as well. So

VMI timer code. It works by taking over the local APIC clock when APIC is configured, which requires a couple hooks into the APIC code. The backend timer code could be commonized into the timer infrastructure, but there are some pieces missing (stolen time, in particular), and the exact semantics of when to do accounting for NO_IDLE need to be shared between different hypervisors as well. So

OK, not strictly in keeping with the subject of the patch set but I needed this to build ;-) Should be merged into 02d-xen-apic-esp0.patch Signed-off-by: Ian Campbell <ian.campbell@xensource.com> diff -r 6fdbec59813e arch/i386/paravirt-xen/enlighten.c --- a/arch/i386/paravirt-xen/enlighten.c Wed Aug 23 15:08:37 2006 +0100 +++ b/arch/i386/paravirt-xen/enlighten.c Wed Aug 23 15:08:37 2006

Here's a first attempt at splitting up paravirt_ops into more specific chunks. Its pretty clunky and chunky; mostly just a lot of replacement. The grouping of ops is very first cut; I'm open to suggestions about what groups should exist and what ops they each should contain. The only slightly subtle part is that I've kept the structures wrapped in a paravirt_ops structure,

Here's a first attempt at splitting up paravirt_ops into more specific chunks. Its pretty clunky and chunky; mostly just a lot of replacement. The grouping of ops is very first cut; I'm open to suggestions about what groups should exist and what ops they each should contain. The only slightly subtle part is that I've kept the structures wrapped in a paravirt_ops structure,

> On Tue, Jul 15, 2008 at 10:33 AM, Suresh Siddha > <suresh.b.siddha at intel.com> wrote: > > On Sun, Jul 13, 2008 at 10:19:35PM -0700, Yinghai Lu wrote: > >> > >> fix for pv. > >> > >> Signed-off-by: Yinghai Lu <yhlu.kernel at gmail.com> > >> > >> --- > >> arch/x86/kernel/paravirt.c | 5 ---- > >>

> On Tue, Jul 15, 2008 at 10:33 AM, Suresh Siddha > <suresh.b.siddha at intel.com> wrote: > > On Sun, Jul 13, 2008 at 10:19:35PM -0700, Yinghai Lu wrote: > >> > >> fix for pv. > >> > >> Signed-off-by: Yinghai Lu <yhlu.kernel at gmail.com> > >> > >> --- > >> arch/x86/kernel/paravirt.c | 5 ---- > >>

Descriptor and trap table cleanups. Add cleanly written accessors for IDT and GDT gates so the subarch may override them. Note that this allows the hypervisor to transparently tweak the DPL of the descriptors as well as the RPL of segments in those descriptors, with no unnecessary kernel code modification. It also allows the hypervisor implementation of the VMI to tweak the gates, allowing for

Descriptor and trap table cleanups. Add cleanly written accessors for IDT and GDT gates so the subarch may override them. Note that this allows the hypervisor to transparently tweak the DPL of the descriptors as well as the RPL of segments in those descriptors, with no unnecessary kernel code modification. It also allows the hypervisor implementation of the VMI to tweak the gates, allowing for

Fairly straightforward code motion in system.h into the sub-arch layer. Affected functionality include control register accessors, which are virtualizable but with great overhead due to the #GP cost; wbinvd, and most importantly, halt and interrupt control, which is non-virtualizable. Since read_cr4_safe can never fault on a VMI kernel (P5+ processor is required for VMI), we can omit the fault

Fairly straightforward code motion in system.h into the sub-arch layer. Affected functionality include control register accessors, which are virtualizable but with great overhead due to the #GP cost; wbinvd, and most importantly, halt and interrupt control, which is non-virtualizable. Since read_cr4_safe can never fault on a VMI kernel (P5+ processor is required for VMI), we can omit the fault

Again, more simple code movement. Move page invalidations and local and global flushes to the sub-arch layer. Note global here does not mean SMP, but the global bit of the page table entry. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.16-rc5/include/asm-i386/tlbflush.h =================================================================== ---

Again, more simple code movement. Move page invalidations and local and global flushes to the sub-arch layer. Note global here does not mean SMP, but the global bit of the page table entry. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.16-rc5/include/asm-i386/tlbflush.h =================================================================== ---

[ I think this is a straight repost this patch, which addresses all the previous comments. I'd like to submit this for .24 as the basis for a unified paravirt_ops. Any objections? ] This patch refactors the paravirt_ops structure into groups of functionally related ops: pv_info - random info, rather than function entrypoints pv_init_ops - functions used at boot time (some for module_init