similar to: SR-IOV: patches are available for Linux kernel [3/4]

[PATCH 4/4] PCI: document SR-IOV SR-IOV Documentation. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- Documentation/ABI/testing/sysfs-bus-pci | 13 ++ Documentation/PCI/00-INDEX | 2 Documentation/PCI/pci-iov-howto.txt | 170 +++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+), 0

[PATCH 4/4] PCI: document SR-IOV SR-IOV Documentation. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- Documentation/ABI/testing/sysfs-bus-pci | 13 ++ Documentation/PCI/00-INDEX | 2 Documentation/PCI/pci-iov-howto.txt | 170 +++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+), 0

[PATCH 4/4] PCI: document SR-IOV SR-IOV Documentation. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- Documentation/ABI/testing/sysfs-bus-pci | 13 ++ Documentation/PCI/00-INDEX | 2 Documentation/PCI/pci-iov-howto.txt | 170 +++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+), 0

Like others on this list I am trying to employ the VTD-NEO patches in Xen 3.2 unstable to assign the internal graphics device to Dom1/Vista. I have removed the Cirrus Logic emulated device from qemu and replaced the Cirrus Logic vgabios with the the actual vgabios from my GPU. However I am hitting an xen assert and was hoping someone might be able to point me in the right direction. Below

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> PCI and PCIBIOS probing only scans devices at function number 0/8/16/... Subdevices (e.g. multiqueue) have function numbers which are not a multiple of 8. The simple hypervisor Jailhouse passes subdevices directly w/o providing a virtual PCI topology like KVM. As a consequence a PCI passthrough from Jailhouse to a guest will not be detected by

On Wed, 28 Feb 2018, Jan Kiszka wrote: > From: Jan Kiszka <jan.kiszka at siemens.com> > > Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to > have a function 0. Therefore, Linux scans for devices at function 0 > (devfn 0/8/16/...) and only scans for other functions if function 0 > has its Multi-Function Device bit set or ARI or SR-IOV indicate >

Create how-to for SR-IOV user and device driver developer. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>

Create how-to for SR-IOV user and device driver developer. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Hi gurus, I used xen 4.1.0 (64bit) + dom0 kernel 2.6.32.39 (32bit) + domu kernel 2.6.32.39 (32bit) environment. I was trying to passthru Broadcom NIC to domu. The NIC can be UP but not RUNNING, on domu #ifconfig eth0 eth0 Link encap:Ethernet HWaddr 00:10:18:95:25:90 inet addr:10.0.0.3 Bcast:10.0.255.255 Mask:255.255.0.0 UP BROADCAST MULTICAST MTU:1500 Metric:1

Currently it is assumed PCI device BAR access < 4G memory. If there is such a device whose BAR size is larger than 4G, it must access > 4G memory address. This patch enable the 64bits big BAR support on hvmloader. v3 changes from v2: - Remain original print information v2 changes from v1 as comments by Jan. 1) Set Dynamic MMIO high memory address instead of a fixed number 640G 2) Mask

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao