similar to: [PATCH 1/6 v3] PCI: export some functions and macros

Centralize capability related functions into several new functions and put PCI resource definitions into an enum. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at

Centralize capability related functions into several new functions and put PCI resource definitions into an enum. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

[PATCH 1/4] PCI: export pci_read_base and add pci_update_base Export pci_read_base; add pci_update_base to for PCI BAR update. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/probe.c | 25 ++++++++-------- drivers/pci/setup-res.c | 74 +++++++++++++++++++++++++++-------------------- include/linux/pci.h |

[PATCH 1/4] PCI: export pci_read_base and add pci_update_base Export pci_read_base; add pci_update_base to for PCI BAR update. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/probe.c | 25 ++++++++-------- drivers/pci/setup-res.c | 74 +++++++++++++++++++++++++++-------------------- include/linux/pci.h |

[PATCH 1/4] PCI: export pci_read_base and add pci_update_base Export pci_read_base; add pci_update_base to for PCI BAR update. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/probe.c | 25 ++++++++-------- drivers/pci/setup-res.c | 74 +++++++++++++++++++++++++++-------------------- include/linux/pci.h |

Add Single Root I/O Virtualization (SR-IOV) support. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>

Add Single Root I/O Virtualization (SR-IOV) support. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>

Add Single Root I/O Virtualization (SR-IOV) support. Signed-off-by: Yu Zhao <yu.zhao@intel.com> diff -r 040046b91eb7 -r 75504b97c0ab drivers/pci/Kconfig --- a/drivers/pci/Kconfig Sat Sep 27 01:25:31 2008 -0400 +++ b/drivers/pci/Kconfig Sat Sep 27 01:27:01 2008 -0400 @@ -27,3 +27,14 @@ When in doubt, say N. +config PCI_IOV + bool "PCI SR-IOV support"

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Detect on probe whether a PCI device is part of a Thunderbolt controller. Intel uses a Vendor-Specific Extended Capability (VSEC) with ID 0x1234 on such devices. Detect presence of this VSEC and cache it in a newly added is_thunderbolt bit in struct pci_dev. Add a helper to check whether a given PCI device is situated on a Thunderbolt daisy chain. The necessity arises from the following: * To

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from