similar to: [PATCH 0/13 v7] PCI: Linux kernel SR-IOV support

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Support SR-IOV capability. By default, this feature is not enabled and the SR-IOV device behaves as traditional PCI device. After it's enabled, each Virtual Function's PCI configuration space can be accessed using its own Bus, Device and Function Number (Routing ID). Each Virtual Function also has PCI Memory Space, which is used to map its own register set. Signed-off-by: Yu Zhao

Centralize capability related functions into several new functions and put PCI resource definitions into an enum. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at

Centralize capability related functions into several new functions and put PCI resource definitions into an enum. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at

Export some functions and move some macros from c file to header file. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at

Export some functions and move some macros from c file to header file. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at

This patch adds the function that reassign page-aligned memory resources, to dom0 linux. The function is useful when we assign I/O device to HVM domain using pci passthrough. When we assign a device to HVM domain using pci passthrough, the device needs to be assigned page-aligned memory resources. If the memory resource is not page-aligned, following error occurs. Error: pci: 0000:00:1d.7:

Add Single Root I/O Virtualization (SR-IOV) support. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>

Add Single Root I/O Virtualization (SR-IOV) support. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>