similar to: SHA256 password patch

Hi, This is an initial implementation of a vhost-user backend for the VirtIO RPMB device. The device is currently in the draft of the next VirtIO specification and describes block device which uses combination of a key, nonce, hashing and a persistent write counter to prevent replay attacks (hence Replay Protected Memory Block). It is implemented as a vhost-user device because we want to

Hello, after upgrading the OpenSSL version from 0.9.7j to 0.9.8k which I used to compile OpenSSH-5.2, I get conflicting type definitions for authfile.c: ../openssl/include/openssl/sha.h:138: error: conflicting types for 'SHA256_CTX' openbsd-compat/sha2.h:66: error: previous declaration of 'SHA256_CTX' was here ../openssl/include/openssl/sha.h:145: error: conflicting types for

in C or C++, how can I get clang/llvm to try and do a "rotate". (want to test this code in the mips16 port) i.e. emit rotr node. tia. reed

On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > On Feb 3, 2009, at 2:28 PM, Kasra wrote: >> I was looking around the LLVM instruction set and I failed to find >> ROL and ROR instructions. Is there any plans on adding these >> instructions to LLVM? > > Not sure what you mean: He's referring to the LLVM IR, I think, and it's true that doesn't have

I can get clang/llvm to emit a rotate instruction on x86-64 when compiling C by just using -Os and the rotate from Hacker's Delight i.e., ====== #include <stdlib.h> #include <stdint.h> uint32_t ror(uint32_t input, size_t rot_bits) { return (input >> rot_bits) | (input << ((sizeof(input) << 3) - rot_bits)); } ====== Then compile with (assuming you are on OS

On 7/2/2018 3:16 PM, Sanjay Patel wrote: > I also agree that the per-element rotate for vectors is what we want for > this intrinsic. > > So I have this so far: > > declare i32 @llvm.catshift.i32(i32 %a, i32 %b, i32 %shift_amount) > declare <2 x i32> @llvm.catshift.v2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %shift_amount) > > For

On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen <dalej at apple.com> wrote: > > On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > >> On Feb 3, 2009, at 2:28 PM, Kasra wrote: >>> I was looking around the LLVM instruction set and I failed to find >>> ROL and ROR instructions. Is there any plans on adding these >>> instructions to LLVM? >>

Nice! Clever compiler.. On 07/28/2012 08:55 PM, Michael Gottesman wrote: > I can get clang/llvm to emit a rotate instruction on x86-64 when compiling C by just using -Os and the rotate from Hacker's Delight i.e., > > ====== > #include<stdlib.h> > #include<stdint.h> > > uint32_t ror(uint32_t input, size_t rot_bits) > { > return (input>>

Per subject, this patch adding an additional pass to handle vector operations; the idea is that this allows removing the code from LegalizeDAG that handles illegal types, which should be a significant simplification. There are still some issues with this patch, but does the approach look sane? -Eli -------------- next part -------------- Index: lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

From: Ashutosh Dixit <ashutosh.dixit at intel.com> This patch introduces the host "Virtio over PCIe" interface for Intel MIC. It allows creating user space backends on the host and instantiating virtio devices for them on the Intel MIC card. A character device per MIC is exposed with IOCTL, mmap and poll callbacks. This allows the user space backend to: (a) add/remove a virtio

From: Ashutosh Dixit <ashutosh.dixit at intel.com> This patch introduces the host "Virtio over PCIe" interface for Intel MIC. It allows creating user space backends on the host and instantiating virtio devices for them on the Intel MIC card. A character device per MIC is exposed with IOCTL, mmap and poll callbacks. This allows the user space backend to: (a) add/remove a virtio

On Tue, Jul 31, 2012 at 8:42 AM, Cameron McInally <cameron.mcinally at nyu.edu> wrote: > Andy, > > Here is the left circular shift operator patch. I apologize to the reviewer > in advance. The patch has a good bit of fine detail. Any > comments/criticisms? > > Some caveats... > > 1) This is just the bare minimum needed to make the left circular shift > operator

On Jan 20, 2009, at 1:22 AM, Jay Foad wrote: >>> I realise that the DataTypes.h.in part might be controversial. Also, >>> there's probably a better place to put it, but I'm not sure where. >> >> I didn't apply this part. What problems does it cause to not have >> this? Can we fix uses of max and min? > > I could try to fix this by changing

The attached patch contains: - Cleanups in the DAGCombiner.cpp ROTL/ROTR combine code, primarily helping me to fix 80col violations (benefiting the code as a whole). - Detect sign/zext/any-extended versions of ROTL/ROTR patterns. - Allow custom lowering for ROTL/ROTR (needed in the CellSPU's case for 8-bit rotates, when only 16-bit and 32-bit rotates are actually implemented in the

Hi all, While I test "clang-tests/gcc-4_2-testsuite/src/gcc.c-torture/execute/20020226-1.c", I faced something wrong with "DAGCombiner::MatchRotate" function. This function tries to consume some patterns and generate "ROTL" or "ROTR" dag node as following comments: "DAGCombier::MatchRotate" function in DAGCombiner.cpp Pattern1 // fold (or

>> I realise that the DataTypes.h.in part might be controversial. Also, >> there's probably a better place to put it, but I'm not sure where. > > I didn't apply this part. What problems does it cause to not have > this? Can we fix uses of max and min? I get these errors in lib: .../lib/Analysis/ValueTracking.cpp:162: error: no matching function for call to

On Mon, 2013-07-29 at 10:05 +0300, Michael S. Tsirkin wrote: > On Wed, Jul 24, 2013 at 08:31:34PM -0700, Sudeep Dutt wrote: > > From: Ashutosh Dixit <ashutosh.dixit at intel.com> > > > > This patch introduces the host "Virtio over PCIe" interface for > > Intel MIC. It allows creating user space backends on the host and > > instantiating virtio

On Mon, 2013-07-29 at 10:05 +0300, Michael S. Tsirkin wrote: > On Wed, Jul 24, 2013 at 08:31:34PM -0700, Sudeep Dutt wrote: > > From: Ashutosh Dixit <ashutosh.dixit at intel.com> > > > > This patch introduces the host "Virtio over PCIe" interface for > > Intel MIC. It allows creating user space backends on the host and > > instantiating virtio

Hi Vitaly, Thank you for the patch! Yet something to improve: [auto build test ERROR on vhost/linux-next] [also build test ERROR on v4.19 next-20181102] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Vitaly-Mayatskikh/vhost-add-vhost_blk-driver/20181103-084141 base:

*NOTE* IIRC compiling this with -O0 on x86-64 can yield the wrong result since clang will emit shifts and on intel shifts are mod the register size: ===== .section __TEXT,__text,regular,pure_instructions .globl _ror .align 4, 0x90 _ror: ## @ror .cfi_startproc ## BB#0: pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp