similar to: How to "Dinamyc NAT"

Displaying 20 results from an estimated 2000 matches similar to: "How to "Dinamyc NAT""

2007 Nov 14
2
rsync problem
I have a simple script that sends one file to two locations on the same destination server. Here's the code: DEST="remotehost" SRC="/home/boss/application.conf" DST1="/home/user1/application.conf" DST2="/home/user2/application.conf" RSYNC1=`rsync -caW -e ssh $SRC $DEST:$DST1` RSYNC2=`rsync -caW -e ssh $SRC $DEST:$DST2` This runs every 5 minutes. What
2017 Nov 11
2
RFC: [GlobalISel] Towards a generic MI combiner framework
On 11/11/2017 12:44 PM, Amara Emerson wrote: > >> On Nov 10, 2017, at 10:04 PM, Aditya Nandakumar <proaditya at gmail.com >> <mailto:proaditya at gmail.com>> wrote: >>> >>> The current DAGCombine, being constructed on top of SDAG, has a kind >>> of built-in CSE and automatic DCE. How will things change, if >>> they'll change, in
2017 Nov 12
0
RFC: [GlobalISel] Towards a generic MI combiner framework
> On Nov 11, 2017, at 11:03 AM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > On 11/11/2017 12:44 PM, Amara Emerson wrote: >> >>> On Nov 10, 2017, at 10:04 PM, Aditya Nandakumar <proaditya at gmail.com <mailto:proaditya at gmail.com>> wrote: >>>> >>>> The current DAGCombine, being constructed on top of
2013 Jan 24
3
[LLVMdev] Initial thoughts on an LLVM backend for N-address generic assembly
Hi all, i'm just starting out with LLVM (although i've been observing its evolution since that first release some years ago :) I would like to develop a backend for a generic assembly-like language, called NAC (N-Address Code). More info on NAC can be found here: http://www.nkavvadias.com/hercules/nac-refman.html (HTML) http://www.nkavvadias.com/hercules/nac-refman.pdf (PDF) You
2017 Sep 18
1
Resend: assertion in MachineCopyPropagation::isNopCopy
Hi, anyone know anything about copy propagation? Matthias, I see this was your code originally? Was there some assumptions you made? I'm hitting an assertion in MachineCopyPropagation::isNopCopy: if (Src == PreviousSrc) { assert(Def == PreviousDef); return true; } This code compares two COPY instruction to see whether they are effectively "the same". The assert assumes
2018 Aug 03
0
BUG: --link-dest may follow symlinks and failure to hard link a non-regular file is fatal
Hi, following the instructions on https://bugzilla.samba.org/createaccount-save.html, I've applied for a bugzilla account at bugzilla-maintenance at samba.org but didn't receive a reply, so I report through this list. With --link-dest the search for a candidate to link from, follows symlinks in directory path components, when the path element is a directory in the source tree but a
2016 Apr 21
5
[Bug 11866] New: rsync fails (failed to re-stat) when using double fuzzy + link-dest on renamed files
https://bugzilla.samba.org/show_bug.cgi?id=11866 Bug ID: 11866 Summary: rsync fails (failed to re-stat) when using double fuzzy + link-dest on renamed files Product: rsync Version: 3.1.1 Hardware: All OS: Linux Status: NEW Severity: normal Priority: P5 Component:
2013 Jan 24
0
[LLVMdev] Initial thoughts on an LLVM backend for N-address generic assembly
On Thu, Jan 24, 2013 at 12:46 PM, <nkavv at physics.auth.gr> wrote: > Hi all, > > i'm just starting out with LLVM (although i've been observing its evolution > since that first release some years ago :) > > I would like to develop a backend for a generic assembly-like language, > called NAC (N-Address Code). More info on NAC can be found here: >
2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
Sure I will split it and put it in two patches. Give me few hours. I need to test those patches. Sirish On 4/19/2012 8:40 AM, Tom Stellard wrote: > On Wed, Apr 18, 2012 at 11:18:05PM -0500, Sirish Pande wrote: >> Hi, >> >> Here's a patch for Hexagon Packetizer for review. This patch does >> not yield any warnings. >> > Would it be possible to split this
2017 Nov 10
2
RFC: [GlobalISel] Towards a generic MI combiner framework
> On Nov 10, 2017, at 10:19 AM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > On 11/10/2017 11:12 AM, Amara Emerson via llvm-dev wrote: >> Hi everyone, >> >> This RFC concerns the design and architecture of a generic machine instruction combiner/optimizer framework to be developed as part of the GISel pipeline. As we transition from
2018 Nov 10
3
[RFC] Tablegen-erated GlobalISel Combine Rules
Thanks Nicolai! > On Nov 9, 2018, at 02:55, Nicolai Hähnle <nhaehnle at gmail.com> wrote: > > Hi Daniel, > > Lots of good stuff in there! I especially like the design for specifying out-of-line predicates. I have a couple of small comments and one major one below. > > > On 09.11.18 02:42, Daniel Sanders via llvm-dev wrote: >> _Passing arbitrary data from
2012 Jun 15
3
moving from loops to apply
Dear subscribers, I have made a simulation using loops rather than apply, simply because the loop function seems more natural to me. However, the current simulation takes forever and I have decided - finally - to learn how to use apply, but - as many other people before me - I am having a hard time changing habits. My current problem is: My current code for the loop is: distances <-
2013 Jan 04
2
[LLVMdev] TableGen patterns with multiple outputs
Are multi-output patterns in TableGen supposed to work, or is that a known limitation in the current implementation? If I have TableGen code like the following... 1242 def SDTTestNode : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>]>; 1243 def TestNode : SDNode<"NVPTXISD::TestNode", SDTTestNode>; 1244 1245 def MyTestNode : NVPTXInst<(outs Int32Regs:$dst0,
2013 Jan 07
2
[LLVMdev] TableGen patterns with multiple outputs
Thanks for the info. Is this on someone's list of things to do? On Sun, Jan 6, 2013 at 7:41 PM, Bob Wilson <bob.wilson at apple.com> wrote: > > On Jan 4, 2013, at 9:52 AM, Justin Holewinski <justin.holewinski at gmail.com> > wrote: > > Are multi-output patterns in TableGen supposed to work, or is that a known > limitation in the current implementation? >
2013 Jan 07
0
[LLVMdev] TableGen patterns with multiple outputs
On Jan 4, 2013, at 9:52 AM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > Are multi-output patterns in TableGen supposed to work, or is that a known limitation in the current implementation? It is a known limitation. You have to write C++ code to match patterns with multiple outputs. > > If I have TableGen code like the following... > > 1242 def SDTTestNode
2013 Jan 07
0
[LLVMdev] TableGen patterns with multiple outputs
It has been something we've talked about for years, but I'm not aware of anyone working on it right now. On Jan 6, 2013, at 5:34 PM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > Thanks for the info. Is this on someone's list of things to do? > > > On Sun, Jan 6, 2013 at 7:41 PM, Bob Wilson <bob.wilson at apple.com> wrote: > > On Jan 4,
2013 Jan 24
0
[LLVMdev] how to map binary code with LLVM IR
Hi Linhai, > Hi, > > I have some applications, which have been compiled into llvm IR and then > linked into executable programs. I have some static information got from > analysing llvm IR, and some dynamic information, like which binary branch is > taken, from hardware sampler. I am wondering whether there are some ways to map > binary code with LLVM IR. The only way I
2013 Jan 23
2
[LLVMdev] how to map binary code with LLVM IR
Hi, I have some applications, which have been compiled into llvm IR and then linked into executable programs. I have some static information got from analysing llvm IR, and some dynamic information, like which binary branch is taken, from hardware sampler. I am wondering whether there are some ways to map binary code with LLVM IR. The only way I know is to use debug info, since both llvm
2003 Jul 24
0
(no subject)
Here is a diff which should allow applying batch updates remotely ( as apposed to copying the batch files to the remote server and running rsync there ). Eg rsync --write-batch=test src dst1::dst rsync --read-batch=test dst2::dst Oli Dewdney diff -E -B -c -r rsync-2.5.6/flist.c rsync-2.5.6-remotebatch/flist.c *** rsync-2.5.6/flist.c Sat Jan 18 18:00:23 2003 ---
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
Hi, On 03/30/2016 11:38 AM, Matt Arsenault wrote: > >> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com >> <mailto:mikael.holmen at ericsson.com>> wrote: >> >> i16 (divm16_pseudo …) >> >> stuff? >> >> I've tried >> (i16, i16 (divm16_pseudo i16:$src1, i16:$src2) >> and >> ((i16, i16)