similar to: Another ? about Speex and CPU

I don't know the AVR32 chip. However for an ARM7TDMI running at 50 MHz, assuming a good compiler and some hand-coded assembly, you would be very close to the achievable limit (couldn't say on which side). So if your AVR32 is faster than an ARM7TDMI, it's likely achievable. If it's slower, then it's likely not achievable. Hope that helps, Jean-Marc On 12-02-29 10:21 PM,

Yes, it does and thanks for the fast answer! The AVR32 runs at same speed but has a built in floating point unit for float calcs and a DSP instruction Set. But If I use the fixed point version I guess it doesn't change anything then. So another question: - Is there a difference of performance/quality between the floating point and the fixed point? Actually, what's the main

Hello, I'm trying to use speex for implementing a VoIP demo application using linphone on an embedded system. At the moment I'm not really able to do real time encoding, and thinking about making an assembler port for speex to the AVR32 architecture. The AVR32 is a new hybrid MCU/DSP fixed point processor running at 120Mhz in my application. Does anyone have experiences/info about the

I didn''t know if any of you had seen this rant about Rails over on Joel on Software but it is an interesting read. Check it out here - http://discuss.joelonsoftware.com/default.asp?joel.3.309321.45 -Rob Bazinet http://www.robertbazinet.com -------------- next part -------------- An HTML attachment was scrubbed... URL:

Is there anyone insterested in taking an online course which covers "Ruby on Rails" (introductory level)? Thanks thuycis -- Posted via http://www.ruby-forum.com/.

Hi, everyone, I''m currently running a Rails 1.0 project using lighttpd-1.4.9 behind Apache 2 on RHEL 3. My fcgi process (I''m only using one right now) always hangs after some time, which is something I haven''t experienced before (e.g., I''ve run this same app. on a TextDrive account and it works fine there). So ... any ideas on what could be causing this?

Greetings everyone, I'm trying to compile asterisk for an AVR32 (Atmel NGW100). Buildroot for AVR32 already has the asterisk package, though it has bugs. Firstly it tries to apply a patch for 1.2 on a 1.6, but deleting the contents of the patch file did the trick. Now, the problem is making asterisk. The first error is because asterisk needed to be ./configure:ed. Trying to just do

I''ve been reading, hearing, and looking at blogs that state Ruby on Rails is rather slow. Coming from a VB 6 world (thank you Microsoft for killing VB because VB.NET is NOT VB) I was always told that VB was a toy or too slow. Now, I''ll easily tell you that yes VB was not a great language. It had it''s share of warts, like a lot of other languages I might add, but

Anyone else interested in an AVR backend? If so, for what members of the AVR family? If we do a port, likely it'll support only the ATmegas. John

Dear Anton, Thank you again for your help! I tried with the following options (adding --with-cpu=arm7tdmi and using binutils from cvs snapshot): ../llvm-gcc4.2-2.6.source/configure --prefix=/usr/local/cross-llvm-gcc-arm-elf-4.2-2.6 --program-prefix=llvm- --enable-llvm=/Users/dummy/Develop/llvm/llvm-build --enable-languages=c,c++ --host=i686-apple-darwin9 --build=i686-apple-darwin9

Dear ML, Anton, Thank you for your answer and your help. I had a look at ARM.td of LLVM 2.6 (in lib/Target/ARM..) where I found following definitions: // V4T Processors. def : ProcNoItin<"arm7tdmi", [ArchV4T]>; def : ProcNoItin<"arm7tdmi-s", [ArchV4T]>; def : ProcNoItin<"arm710t", [ArchV4T]>; def :

Hello, Pazzo > Any clue? Yes. Sorry, my fault - next time I should check ARM docs before replying. ARM7TDMI is ARMv4T and this is not supported by LLVM (LLVM does v5+ codegen). -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

I have a client who might well make use of an AVR32 port, but I suspect that machine is very different than the one you are currently examining. shap On Mon, 2008-05-19 at 12:38 -0600, John Regehr wrote: > Anyone else interested in an AVR backend? > > If so, for what members of the AVR family? If we do a port, likely it'll > support only the ATmegas. > > John >

Hello everyone, this is most likely Arm specific, but could affect other targets where there is a somewhat complex relationship between the triple and mcpu option. At present when clang is used as a linker driver for the gold-plugin and when using and an explicit -mcpu is not given to clang, then clang will always generate a -Wl,-plugin-opt=mcpu=<default CPU> where the default CPU is based

On Jun 6, 2013, at 8:35 PM, Tobias Grosser <grosser at google.com> wrote: > I understand that some users do not require 754 compliant floating point behavior (clang on darwin?), which means they would probably not need this change. However, it should also not hurt them performance-wise as such users would probably set the relevant global fast-math flags to reduce the precision

Dear Anton, Thanks for your help! I had a look to llvm (2.6) configure options but I couldn't find any way to specify cpu type, fpu ecc..Could you please give me any indication and/or example? I want to try llvm with Atmel's AT91SAM7X256 (core is ARM7TDMI ) Thank you again, pz 2010/1/9 Anton Korobeynikov <anton at korobeynikov.info>: > Hello > >> But I got the

Hi, On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction sequence it is now. I'm not sure if adding RBIT to ARMISD and doing this optimization in the legalize pass is the best option, but the only better way I could think of doing it was to add a bitreverse intrinsic to llvm ir, which itself might not be the best option since bitreverse probably isn't too common. Other

> I have a client who might well make use of an AVR32 port, but I suspect > that machine is very different than the one you are currently examining. I have not looked at AVR32 closely but my understanding is that it is a new architecture that shares a substring with AVR for marketing reasons. John

Hi, I wanted to know if it was possible to force ARM backend to compile a function in ARM while the rest is in Thumb mode. I tried the attributes which is used in GCC but it doesn't work. Here is what I tried: https://pastebin.com/jCr5LPUY Thanks in advance, Uvekilledkenny -------------- next part -------------- An HTML attachment was scrubbed... URL:

Well, it's an ARM7TDMI core, so basically one register operation per clock, with memory accesses taking longer. Having the memory on-chip should make memory access much less of an impact. I was afraid that you would answer the way you did: I thought about my question after I sent it, and the "LP" in CELP is what makes it a sequential process; it can't do linear prediction on a