similar to: RFQ for Software/Hardware Development Using your Codec

Khronos has announced a Request For Quotations for a WebCL Kernel Validator. The Validator will enforce compliance of WebCL kernels with the defined WebCL language restrictions, and prevent out of bounds memory accesses. The WebCL kernel Validator will enforce out of bounds memory protections, and will perform syntactic validation of WebCL kernels. The WebCL Validator RFQ can be accessed from:

I wanted a sort of matrix product of an array and a matrix. As there does not seem to be any array multiplication apart from outer() I proceeded as follows: lambda <- array(0, c(n,m,d)) # stuff omitted # zed is an n by m matrix # # \lamb.star_{ik} lamb.star <- matrix(0, nrow=n, ncol=d) for (i in 1:n) { for (k in 1:d) { for (j in 1:m) { lamb.star[i,k] = lamb.star[i,k] +

I see in the x86 InstInfo.td the following for the INC instructions: def INC8r : I<0xFE, MRM0r, (ops GR8 :$dst, GR8 :$src), "inc{b} $dst", [(set GR8:$dst, (add GR8:$src, 1))]>; Which seem to have the same restriction that I'm trying to implement, but I don't understand how this ensures that $src and $dst are the same register. -- Christopher Lamb

Reciban un cordial saludo. De manera muy comedida les pido ayuda con la función indicada abajo. La usan en un artículo de inventarios. No veo dónde estoy errado. Gracias de antemano. César Escalante C. > lamb<-50 > L<-1 > h.<-10 > p<-25 > K<-5 > integ<-function(y){integrate(function(x)ppois(x,lamb*L),0,y)$value} > G<-function(y){(h.+p)*integ(y) +

On Wed, 2007-03-28 at 10:22 -0500, Christopher Lamb wrote: > I don't want to drive this too off topic, but I should be clear that I > wasn't suggesting that the LLVM project adopt XPJ as it's official > config file format for Visual Studio. I have found it useful to use > XPJ to generate the initial VS projects for a code base that doesn't > already have VS projects.

I don't want to drive this too off topic, but I should be clear that I wasn't suggesting that the LLVM project adopt XPJ as it's official config file format for Visual Studio. I have found it useful to use XPJ to generate the initial VS projects for a code base that doesn't already have VS projects. I also find it nice to be able to see all of the config options in a

On Apr 23, 2007, at 1:17 PM, Christopher Lamb wrote: > > On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote: > >> On Mon, 23 Apr 2007, Christopher Lamb wrote: >>> How can one let the back end know how to insert and extract >>> elements of >>> a vector through sub-register copies? I'm at a loss how to do >>> this... >> >> You

It's not clear it offers any real benefits. The project files already exist. To use this, I would have to throw them away and create new XML files by hand. I would have to maintain them by hand also, whereas the project files are maintainable from within Visual Studio, i.e. via an integrated GUI interface. And to comment on supporting other targets: No reason it can't be done,

On Mar 18, 2007, at 7:05 PM, Chris Lattner wrote: > On Sun, 18 Mar 2007, Christopher Lamb wrote: >>> LLVM can currently produce .o files directly in some limited cases, >>> or you >>> can go through an assembler, which is much more robust. Any help >>> improving the direct ELF writer would be appreciated. >> >> Which of the LLVM tools can

On Sat, 2007-04-21 at 18:28 -0500, Christopher Lamb wrote: > On Apr 21, 2007, at 6:12 PM, Reid Spencer wrote: > > > On Sat, 2007-04-21 at 18:07 -0500, Christopher Lamb wrote: > >> I'm getting a regression after my fixes that's coming from > >> getABIAlignment not finding an alignment to use for a <float x1> > >> type, > >> is this a

On Dec 17, 2007, at 1:22 AM, Torvald Riegel wrote: > Would it be possible to keep get() unchanged, with a default > behaviour, plus > a warning? Otherwise everybody (assuming everybody gets type void*) > will > have to update their LLVM passes, and either maintain two versions > of the > passes or require their clients to use a certain LLVM version. AFAIK API

On Mar 25, 2007, at 2:18 AM, Chris Lattner wrote: > On Sat, 24 Mar 2007, Christopher Lamb wrote: >> Has there been any discussion of supporting the 'restrict' C99 >> keyword >> and C++ extension to boost alias analysis? My impression is that this >> would require modification of the LLVM IR. I couldn't find any >> discussion hits using the usual

On Sep 22, 2007, at 10:36 AM, Christopher Lamb <christopher.lamb at gmail.com > wrote: > > On Sep 22, 2007, at 4:05 AM, Andreas Fredriksson wrote: > >> On 9/21/07, Christopher Lamb <christopher.lamb at gmail.com> wrote: >> >>> ISel patterns are matched against DAGs before register allocation. >>> So you >>> are correct that ISel

Has there been any discussion of supporting the 'restrict' C99 keyword and C++ extension to boost alias analysis? My impression is that this would require modification of the LLVM IR. I couldn't find any discussion hits using the usual suspects for searches... -- Christopher Lamb christopher.lamb at gmail.com -------------- next part -------------- An HTML attachment was

On Jun 11, 2007, at 7:22 PM, Evan Cheng wrote: > > On Jun 11, 2007, at 6:14 PM, Christopher Lamb wrote: > >> >> What's the best way to get an SDNode through to DAG scheduling >> without getting mangled during Lowering/ISel? > > What do you mean by "mangled"? Please clarify. My mangled I mean the nodes shouldn't be isel'ed into anything else

On Mar 30, 2007, at 11:10 AM, Devang Patel wrote: > > On Mar 29, 2007, at 2:42 PM, Christopher Lamb wrote: > >> I'm not really sure exactly what's left to do to fully implement >> what I need. I had assumed that this work would allow me to >> determine if a LD/ST was based on an aligned pointer or not, but >> this seems now like the tip of the

On Mar 30, 2007, at 12:35 PM, Christopher Lamb wrote: > > On Mar 18, 2007, at 7:05 PM, Chris Lattner wrote: > >> On Sun, 18 Mar 2007, Christopher Lamb wrote: >>>> LLVM can currently produce .o files directly in some limited cases, >>>> or you >>>> can go through an assembler, which is much more robust. Any help >>>> improving the

I have some instructions that use a register as both an input and as the output. Is there a way to specify this constraint in the InstrInfo.td or will this have to be custom selected/lowered? Thanks -- Christopher Lamb christopher.lamb at gmail.com -------------- next part -------------- An HTML attachment was scrubbed... URL:

On Mar 29, 2007, at 3:54 PM, Devang Patel wrote: > Christopher, > > On Mar 29, 2007, at 12:49 PM, Devang Patel wrote: > >> >> On Mar 29, 2007, at 12:24 PM, Christopher Lamb wrote: >> >>> Is anyone actively working on this currently? It's marked as >>> unassigned in BZ. >> >> In next few days I'll get to this. At the moment

On Apr 23, 2007, at 1:43 PM, Christopher Lamb wrote: > On Apr 23, 2007, at 1:17 PM, Christopher Lamb wrote: > >> On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote: >> >>> On Mon, 23 Apr 2007, Christopher Lamb wrote: >>>> How can one let the back end know how to insert and extract >>>> elements of >>>> a vector through sub-register